ref: 221d2f1d0bd3b811a32f07372e61b0f124dd25f2
parent: 1b250fe1e459965861edff5868c7f1ca2b1f1ff9
author: mia soweli <inbox@tachibana-labs.org>
date: Sun Jul 30 20:11:17 EDT 2023
mmu: remove redundant stash and splhi in cache ops
--- a/lcache.s
+++ b/lcache.s
@@ -28,20 +28,8 @@
/* l1 unified instruction + data cache writeback + invalidate */
TEXT l1ucachewbinv(SB), $-4
- /* stash and splhi */
- MOVW CPSR, R0
- MOVM.DB.W [R0], (SP)
- MOVM.DB.W [R14], (SP)
- CPSID
-
- /* go */
BL l1dcachewbinv(SB)
BL l1icacheinv(SB)
-
- /* restore and splx */
- MOVM.IA.W (SP), [R14]
- MOVM.IA.W (SP), [R0]
- MOVW R0, CPSR
RET
/* l2 instruction + data cache writeback */
@@ -64,19 +52,8 @@
/* l1 unified instruction + data cache writeback + invalidate */
TEXT l2ucachewbinv(SB), $-4
- /* stash and splhi */
- MOVW CPSR, R0
- MOVM.DB.W [R0], (SP)
- MOVM.DB.W [R14], (SP)
- CPSID
-
BL l2idcachewbinv(SB)
BL l2idcacheinv(SB)
-
- /* restore and splx */
- MOVM.IA.W (SP), [R14]
- MOVM.IA.W (SP), [R0]
- MOVW R0, CPSR
RET
/* set/way operations for cacheop */
@@ -94,12 +71,10 @@
/* apply a cache operation to the whole cache */
TEXT cacheop(SB), $-4
- /* stash and splhi */
- MOVW CPSR, R2
+ /* stash */
MOVM.DB.W [R2,R14], (SP)
MOVW R0, Rop
MOVW R1, Rcache
- CPSID
/* get cache geometry */
MCR 15, 2, Rcache, C0, C0, 0; ISB
@@ -137,7 +112,6 @@
SUB $1, Rset; CMP $0, Rset; BEQ cacheopsets /* loop sets */
SUB $1, Rways; CMP $0, Rways; BEQ cacheopways /* loop ways */
- /* restore regs and splx */
+ /* restore */
MOVM.IA.W (SP), [R2,R14]
- MOVW R2, CPSR
RET
--- a/mmu.c
+++ b/mmu.c
@@ -228,10 +228,9 @@
void
putmmu(uintptr va, uintptr pa, Page *page)
{+ int l1x, s, x;
PTE *l1, *l2;
Page *pg;
- int l1x;
- int x;
l1x = L1(va);
l1 = &m->mmul1[l1x];
@@ -252,9 +251,11 @@
up->mmul2 = pg;
/* FIXME: excessive invalidation */
+ s = splhi();
*l1 = PPN(pg->pa)|L1coarse;
l1ucachewbinv();
l2ucachewbinv();
+ splx(s);
}
/* put l2 entry */
@@ -271,6 +272,7 @@
l2 = KADDR(PPN(*l1)); l2[L2(va)] = PPN(pa)|x;
/* FIXME: excessive invalidation */
+ s = splhi();
l1ucachewbinv();
l2ucachewbinv();
if(needtxtflush(page)) {@@ -278,6 +280,7 @@
donetxtflush(page);
}
+ splx(s);
mmuinvalidate();
mmudebug("putmmu");}