ref: cb6c8f7c8de6838b41012db42e9d0141270b32be
parent: 157d67bedaef608486224b8181423d0f4a33a787
author: mia soweli <inbox@tachibana-labs.org>
date: Sat Sep 2 23:06:55 EDT 2023
9: implement timerset and hook up portclock
--- a/sys/src/9/omap/main.c
+++ b/sys/src/9/omap/main.c
@@ -187,6 +187,7 @@
trapinit();
intrinit();
timerinit();
+ timersinit();
cpuidprint();
procinit0();
initseg();
--- a/sys/src/9/omap/timer.c
+++ b/sys/src/9/omap/timer.c
@@ -26,6 +26,12 @@
Rldr = 0x2c,
};
+enum {
+ Trate = 32*1024,
+ Tcycles = Trate/HZ,
+ Tcyclesmin = Tcycles/100,
+};
+
typedef union Counter Counter;
typedef struct Ctlr Ctlr;
@@ -128,7 +134,7 @@
/* FIXME: this has poor precision, but qemu has no cycle counter */
ctlr = &timers[0];
if(hz)
- *hz = 32*1024;
+ *hz = Trate;
ilock(ctlr);
c.cnt = ctlr->cnt;
@@ -166,7 +172,17 @@
}
void
-timerset(Tval)
+timerset(Tval next)
{
- /* FIXME: ? */
+ long off;
+
+ ilock(&timers[1]);
+ off = next - fastticks(nil);
+ if(off > Tcycles)
+ off = Tcycles;
+ if(off < Tcyclesmin)
+ off = Tcyclesmin;
+
+ csr32w(&timers[1], Rcrr, -off);
+ iunlock(&timers[1]);
}