ref: e8dc10b3b573fb5b696d8667826cd16629983494
parent: 0dad804010351b45fd7d1b0b608886412f518593
author: mia soweli <inbox@tachibana-labs.org>
date: Tue Aug 29 02:15:43 EDT 2023
mmu: unified cache invalidation needs to stash lr lr must be stashed or we loop forever at the ret. fixes fail to boot introduced in 221d2f1.
--- a/lcache.s
+++ b/lcache.s
@@ -28,8 +28,10 @@
/* l1 unified instruction + data cache writeback + invalidate */
TEXT l1ucachewbinv(SB), $-4
+ MOVM.DB.W [R14], (SP)
BL l1dcachewbinv(SB)
BL l1icacheinv(SB)
+ MOVM.IA.W (SP), [R14]
RET
/* l2 instruction + data cache writeback */
@@ -52,8 +54,10 @@
/* l1 unified instruction + data cache writeback + invalidate */
TEXT l2ucachewbinv(SB), $-4
+ MOVM.DB.W [R14], (SP)
BL l2idcachewbinv(SB)
BL l2idcacheinv(SB)
+ MOVM.IA.W (SP), [R14]
RET
/* set/way operations for cacheop */