ref: 66269665be3e744d8b94b52b2aa4dcb9158ce59b
parent: 9cdf8d4b4c9ecf24e8e065fdbf9a6aea48d5f4af
author: Roberto E. Vargas Caballero <k0ga@shike2.com>
date: Tue Dec 12 16:13:16 EST 2017
[as-z80] Add HL,imm16 opcodes
--- a/as/target/gen.awk
+++ b/as/target/gen.awk
@@ -85,8 +85,10 @@
out = out "AREG_A"
} else if (match(a, /^indir_HL/)) {out = out "AINDER_HL"
+ } else if (match(a, /^HL/)) {+ out = out "AREG_HL"
} else {- print "wrong arg", a
+ print "wrong arg", a > "/dev/stderr"
exit 1
}
a = substr(a, RLENGTH+1)
--- a/as/target/x80/ins.c
+++ b/as/target/x80/ins.c
@@ -108,6 +108,23 @@
}
void
+r_imm16(Op *op, Node **args)
+{+ Node *par1, *par2;
+ unsigned char buf[3];
+ unsigned val;
+ int n = op->size;
+
+ par2 = args[1];
+
+ memcpy(buf, op->bytes, n-2);
+ val = par2->sym->value;
+ buf[n-1] = val >> 8;
+ buf[n-2] = val;
+ emit(cursec, buf, n);
+}
+
+void
r8_r8(Op *op, Node **args)
{Node *par1, *par2;
--- a/as/target/x80/x80.dat
+++ b/as/target/x80/x80.dat
@@ -67,6 +67,8 @@
LD indir_HL,reg_r 1 0x70 xx_r8_2 Z80,R800,GB80
LD reg_r,indir_HL 1 0x46 r8_xx_1 Z80,R800,GB80
+LD HL,imm16 3 0x21 r_imm16 Z80,R800,GB80
+
ADD regA,reg_r 1 0x80 xx_r8_2 Z80,R800,GB80
ADD regA,reg_p 2 0xdd,0x80 xx_r8_2 Z80,R800
ADD regA,reg_q 2 0xfd,0x80 xx_r8_2 Z80,R800
--- a/as/target/z80/proc.c
+++ b/as/target/z80/proc.c
@@ -93,6 +93,10 @@
if (!qclass(np->sym->argtype))
return 0;
break;
+ case AREG_HL:
+ if (np->op != AREG && np->sym->argtype != AREG_HL)
+ return 0;
+ return 1;
case AIMM8:
case AIMM16:
case AIMM32: