ref: 0ee738ef8c34d5494265b8a14435333f45b96dc6
parent: a524fd06466b057638d8bf40f8f9f380033320fe
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Tue Oct 1 20:58:46 EDT 2019
vgai81x: use vmap() for uncached access to cursor data instead of manipulating kernel page table on 386, the kernel memory region is mapped using huge 4MB pages (when supported by the cpu). so the uncached pte manipulation does not work to map the cursor data with uncached attribute. instead, we allocate a memory page using newpage() and map it globally using vmap(), which maps it uncached.
--- a/sys/src/9/pc/vgai81x.c
+++ b/sys/src/9/pc/vgai81x.c
@@ -56,7 +56,7 @@
Pcidev *p;
int size;
Mach *mach0;
- ulong *pgtbl, *rp, cursor, *pte, fbuf, fbend;
+ ulong *pgtbl, *rp, fbuf, fbend;
if(scr->mmio)
return;
@@ -90,18 +90,7 @@
fbuf += BY2PG;
}
- /*
- * allocate space for the cursor data in system memory.
- * must be uncached.
- */
- cursor = (ulong)xspanalloc(BY2PG, BY2PG, 0);
- mach0 = MACHP(0);
- pte = mmuwalk(mach0->pdb, cursor, 2, 0);
- if(pte == nil)
- panic("i81x cursor mmuwalk");
- *pte |= PTEUNCACHED;
- scr->storage = cursor;
-
+ scr->storage = 0;
scr->blank = i81xblank;
}
@@ -123,7 +112,7 @@
uchar *p;
CursorI81x *hwcurs;
- if(scr->mmio == 0)
+ if(scr->mmio == 0 || scr->storage == 0)
return;
hwcurs = (void*)((uchar*)scr->mmio+hwCur);
@@ -192,17 +181,26 @@
{
int i;
uchar *p;
- CursorI81x *hwcurs;
i81xenable(scr);
if(scr->mmio == 0)
return;
- hwcurs = (void*)((uchar*)scr->mmio+hwCur);
+ if(scr->storage == 0){
+ CursorI81x *hwcurs;
+ Page *pg = newpage(0, nil, 0);
+ scr->storage = (uintptr)vmap(pg->pa, BY2PG);
+ if(scr->storage == 0){
+ putpage(pg);
+ return;
+ }
+ hwcurs = (void*)((uchar*)scr->mmio+hwCur);
+ hwcurs->base = pg->pa;
+ }
+
/*
* Initialise the 32x32 cursor to be transparent in 2bpp mode.
*/
- hwcurs->base = PADDR(scr->storage);
p = (uchar*)scr->storage;
for(i = 0; i < 32/2; i++) {
memset(p, 0xff, 8);
@@ -209,6 +207,7 @@
memset(p+8, 0, 8);
p += 16;
}
+
/*
* Load, locate and enable the 32x32 cursor in 2bpp mode.
*/