shithub: riscv

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ref: 2063019560c6a3154e6ef0e6e9f24d70c8ba09da
parent: d75d842cf576cb4785f89c5f5b73a4f73170001b
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sun Nov 1 20:01:48 EST 2020

vmx: mask out bits 0:2 and 24:30 of pci CONFIG_ADDRESS on read

These bits are reserved, and by the specification,
must return zero on read.

This is also used by plan 9 for detecting config mode #1.

--- a/sys/src/cmd/vmx/pci.c
+++ b/sys/src/cmd/vmx/pci.c
@@ -237,7 +237,7 @@
 
 	switch(isin << 16 | port){
 	case 0x0cf8: cfgaddr = val; return 0;
-	case 0x10cf8: return cfgaddr;
+	case 0x10cf8: return cfgaddr & ~0x7f000003;
 	case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
 		val <<= 8 * (port & 3);
 		mask = -1UL >> 32 - 8 * sz << 8 * (port & 3);