ref: 2559e19e1944f3ff880274d0a7d172976d082c33
parent: 55d3e11f0f68bfe26fb56029b53e3c1c50c40c2c
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Fri Nov 20 01:25:01 EST 2015
libmp: 386/amd64 mpvec*(): replace conditional branches with ADC/SBB instructions
--- a/sys/src/libmp/386/mpvecadd.s
+++ b/sys/src/libmp/386/mpvecadd.s
@@ -35,11 +35,8 @@
/* sum[alen] = carry */
_addend:
- JC _addcarry
- MOVL $0,(DI)(BP*4)
- RET
-_addcarry:
- MOVL $1,(DI)(BP*4)
+ ADCL $0, CX
+ MOVL CX, (DI)(BP*4)
RET
/* sum[blen:alen-1],carry = a[blen:alen-1] + 0 */
--- a/sys/src/libmp/386/mpvecdigmuladd.s
+++ b/sys/src/libmp/386/mpvecdigmuladd.s
@@ -36,13 +36,9 @@
MOVL (SI)(BP*4),AX /* lo = b[i] */
MULL BX /* hi, lo = b[i] * m */
ADDL CX,AX /* lo += oldhi */
- JCC _muladdnocarry1
- INCL DX /* hi += carry */
-_muladdnocarry1:
+ ADCL $0, DX /* hi += carry */
ADDL AX,(DI)(BP*4) /* p[i] += lo */
- JCC _muladdnocarry2
- INCL DX /* hi += carry */
-_muladdnocarry2:
+ ADCL $0, DX /* hi += carry */
MOVL DX,CX /* oldhi = hi */
INCL BP /* i++ */
JNZ _muladdloop
--- a/sys/src/libmp/386/mpvecdigmulsub.s
+++ b/sys/src/libmp/386/mpvecdigmulsub.s
@@ -33,21 +33,15 @@
MOVL (SI)(BP*4),AX /* lo = b[i] */
MULL BX /* hi, lo = b[i] * m */
ADDL 0(SP),AX /* lo += oldhi */
- JCC _mulsubnocarry1
- INCL DX /* hi += carry */
-_mulsubnocarry1:
+ ADCL $0, DX /* hi += carry */
SUBL AX,(DI)(BP*4)
- JCC _mulsubnocarry2
- INCL DX /* hi += carry */
-_mulsubnocarry2:
+ ADCL $0, DX /* hi += carry */
MOVL DX,0(SP)
INCL BP
LOOP _mulsubloop
- MOVL 0(SP),AX
- SUBL AX,(DI)(BP*4)
- JCC _mulsubnocarry3
- MOVL $-1,AX
- RET
-_mulsubnocarry3:
- MOVL $1,AX
+ MOVL CX, AX
+ MOVL 0(SP),BX
+ SUBL BX,(DI)(BP*4)
+ SBBL CX, AX
+ ORL $1, AX
RET
--- a/sys/src/libmp/amd64/mpvecadd.s
+++ b/sys/src/libmp/amd64/mpvecadd.s
@@ -9,7 +9,6 @@
MOVL alen+8(FP),DX
MOVL blen+24(FP),CX
-/* MOVL a+0(FP),SI */
MOVQ RARG, SI
MOVQ b+16(FP),BX
SUBL CX,DX
@@ -35,12 +34,10 @@
LOOP _addloop2
/* sum[alen] = carry */
+
_addend:
- JC _addcarry
- MOVL $0,(DI)(BP*4)
- RET
-_addcarry:
- MOVL $1,(DI)(BP*4)
+ ADCL $0, CX
+ MOVL CX,(DI)(BP*4)
RET
/* sum[blen:alen-1],carry = a[blen:alen-1] + 0 */
--- a/sys/src/libmp/amd64/mpvecdigmuladd.s
+++ b/sys/src/libmp/amd64/mpvecdigmuladd.s
@@ -22,7 +22,6 @@
*/
TEXT mpvecdigmuladd(SB),$0
-/* MOVQ b+0(FP),SI */
MOVQ RARG,SI
MOVL n+8(FP),CX
MOVL m+16(FP),BX
@@ -37,13 +36,9 @@
MOVL (SI)(BP*4),AX /* lo = b[i] */
MULL BX /* hi, lo = b[i] * m */
ADDL CX,AX /* lo += oldhi */
- JCC _muladdnocarry1
- INCL DX /* hi += carry */
-_muladdnocarry1:
+ ADCL $0, DX /* hi += carry */
ADDL AX,(DI)(BP*4) /* p[i] += lo */
- JCC _muladdnocarry2
- INCL DX /* hi += carry */
-_muladdnocarry2:
+ ADCL $0, DX /* hi += carry */
MOVL DX,CX /* oldhi = hi */
INCQ BP /* i++ */
JNZ _muladdloop
--- a/sys/src/libmp/amd64/mpvecdigmulsub.s
+++ b/sys/src/libmp/amd64/mpvecdigmulsub.s
@@ -22,8 +22,6 @@
*
*/
TEXT mpvecdigmulsub(SB),$0
-
-/* MOVL b+0(FP),SI */
MOVQ RARG,SI
MOVL n+8(FP),CX
MOVL m+16(FP),BX
@@ -34,20 +32,14 @@
MOVL (SI)(BP*4),AX /* lo = b[i] */
MULL BX /* hi, lo = b[i] * m */
ADDL R8,AX /* lo += oldhi */
- JCC _mulsubnocarry1
- INCL DX /* hi += carry */
-_mulsubnocarry1:
+ ADCL $0, DX /* hi += carry */
SUBL AX,(DI)(BP*4)
- JCC _mulsubnocarry2
- INCL DX /* hi += carry */
-_mulsubnocarry2:
+ ADCL $0, DX /* hi += carry */
MOVL DX,R8
INCL BP
LOOP _mulsubloop
+ MOVL CX, AX
SUBL R8,(DI)(BP*4)
- JCC _mulsubnocarry3
- MOVQ $-1,AX
- RET
-_mulsubnocarry3:
- MOVQ $1,AX
+ SBBQ CX, AX
+ ORQ $1, AX
RET