ref: 2b89cdee025d9b3faccd62bc3515d7ed749ae26f
parent: 29a6cbf7ee601665c7ca204385d96a6c2a3080d8
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sat Jul 9 11:15:55 EDT 2022
imx8: set virtual timer offset to zero for all cores we want CNTVCT_EL0 to be the same on all cores, so we set the offset the same so it effectively becomes the system counter.
--- a/sys/src/9/imx8/clock.c
+++ b/sys/src/9/imx8/clock.c
@@ -41,6 +41,9 @@
freq = sysrd(CNTFRQ_EL0);
print("timer frequency %lld Hz\n", freq);
}
+ m->cpuhz = freq;
+ m->cpumhz = (freq + Mhz/2 - 1) / Mhz;
+ m->cyclefreq = freq;
intrenable(IRQcntpns, localclockintr, nil, BUSUNKNOWN, "clock");
}
--- a/sys/src/9/imx8/l.s
+++ b/sys/src/9/imx8/l.s
@@ -96,6 +96,10 @@
MSR R0, MDCR_EL2
ISB $SY
+ /* set virtual timer offset to zero */
+ MOV $0, R0
+ MSR R0, CNTVOFF_EL2
+
/* HCR = RW, HCD, SWIO, BSU, FB */
MOVWU $(1<<31 | 1<<29 | 1<<2 | 0<<10 | 0<<9), R0
MSR R0, HCR_EL2
--- a/sys/src/9/imx8/sysreg.h
+++ b/sys/src/9/imx8/sysreg.h
@@ -38,6 +38,7 @@
#define CNTP_TVAL_EL0 SYSREG(3,3,14,2,0)
#define CNTP_CTL_EL0 SYSREG(3,3,14,2,1)
#define CNTP_CVAL_EL0 SYSREG(3,3,14,2,2)
+#define CNTVOFF_EL2 SYSREG(3,4,14,0,3)
#define TPIDR_EL0 SYSREG(3,3,13,0,2)
#define TPIDR_EL1 SYSREG(3,0,13,0,4)