ref: 3a77c01f43821dcc4f7cae54aff89bb20f2d95a5
parent: 911df94e5d712d7e2eebb4a3997efce17e2599f2
author: aiju <devnull@localhost>
date: Wed Jul 11 10:50:22 EDT 2018
pc kernel: get rid of ugly and partially broken cpuid macros
--- a/sys/src/9/pc/cputemp.c
+++ b/sys/src/9/pc/cputemp.c
@@ -35,7 +35,7 @@
* magic undocumented msr. tj(max) is 100 or 85.
*/
tj = 100;
- d = X86MODEL(m->cpuidax);
+ d = m->cpuidmodel;
d |= (m->cpuidax>>12) & 0xf0;
if((d == 0xf && (m->cpuidax & 0xf)>1) || d == 0xe){ if(rdmsr(0xee, &emsr) == 0){@@ -109,7 +109,7 @@
for(j = 0; j < max; j++){pcicfgw32(p, 0xe4, pcicfgr32(p, 0xe4) & ~4 | j<<2);
i = pcicfgr32(p, 0xe4);
- if(X86STEPPING(m->cpuidax) == 2)
+ if(m->cpuidstepping == 2)
t = i>>16 & 0xff;
else{t = i>>14 & 0x3ff;
@@ -165,8 +165,8 @@
{if(intelcputempok())
addarchfile("cputemp", 0444, intelcputemprd, nil);- if(X86FAMILY(m->cpuidax) == 0x0f && !strcmp(m->cpuidid, "AuthenticAMD"))
+ if(m->cpuidfamily == 0x0f && !strcmp(m->cpuidid, "AuthenticAMD"))
addarchfile("cputemp", 0444, amd0ftemprd, nil);- if(X86FAMILY(m->cpuidax) == 0x10 && !strcmp(m->cpuidid, "AuthenticAMD"))
+ if(m->cpuidfamily == 0x10 && !strcmp(m->cpuidid, "AuthenticAMD"))
addarchfile("cputemp", 0444, amd10temprd, nil);}
--- a/sys/src/9/pc/dat.h
+++ b/sys/src/9/pc/dat.h
@@ -238,6 +238,9 @@
int cpuiddx;
char cpuidid[16];
char* cpuidtype;
+ uchar cpuidfamily;
+ uchar cpuidmodel;
+ uchar cpuidstepping;
int havetsc;
int havepge;
int havewatchpt8;
--- a/sys/src/9/pc/devarch.c
+++ b/sys/src/9/pc/devarch.c
@@ -753,6 +753,17 @@
m->cpuidax = regs[0];
m->cpuidcx = regs[2];
m->cpuiddx = regs[3];
+
+ m->cpuidfamily = m->cpuidax >> 8 & 0xf;
+ m->cpuidmodel = m->cpuidax >> 4 & 0xf;
+ m->cpuidstepping = m->cpuidax & 0xf;
+ switch(m->cpuidfamily){+ case 6:
+ m->cpuidmodel += m->cpuidax >> 16 & 0xf;
+ /* wet floor */
+ case 15:
+ m->cpuidfamily += m->cpuidax >> 20 & 0xff;
+ }
if(strncmp(m->cpuidid, "AuthenticAMD", 12) == 0 ||
strncmp(m->cpuidid, "Geode by NSC", 12) == 0)
@@ -764,8 +775,8 @@
else
tab = x86intel;
- family = X86FAMILY(m->cpuidax);
- model = X86MODEL(m->cpuidax);
+ family = m->cpuidfamily;
+ model = m->cpuidmodel;
for(t=tab; t->name; t++)
if((t->family == family && t->model == model)
|| (t->family == family && t->model == -1)
@@ -994,7 +1005,7 @@
if(strcmp(cb->f[1], "mb386") == 0)
coherence = mb386;
else if(strcmp(cb->f[1], "mb586") == 0){- if(X86FAMILY(m->cpuidax) < 5)
+ if(m->cpuidfamily < 5)
error("invalid coherence ctl on this cpu family");coherence = mb586;
}else if(strcmp(cb->f[1], "mfence") == 0){@@ -1093,13 +1104,13 @@
* We get another chance to set it in mpinit() for a
* multiprocessor.
*/
- if(X86FAMILY(m->cpuidax) == 3)
+ if(m->cpuidfamily == 3)
conf.copymode = 1;
- if(X86FAMILY(m->cpuidax) >= 4)
+ if(m->cpuidfamily >= 4)
cmpswap = cmpswap486;
- if(X86FAMILY(m->cpuidax) >= 5)
+ if(m->cpuidfamily >= 5)
coherence = mb586;
if(m->cpuiddx & Sse2)
--- a/sys/src/9/pc/io.h
+++ b/sys/src/9/pc/io.h
@@ -1,8 +1,3 @@
-#define X86STEPPING(x) ((x) & 0x0F)
-/* incorporates extended-model and -family bits */
-#define X86MODEL(x) ((((x)>>4) & 0x0F) | (((x)>>16) & 0x0F)<<4)
-#define X86FAMILY(x) ((((x)>>8) & 0x0F) | (((x)>>20) & 0xFF)<<4)
-
enum {VectorDE = 1, /* debug exception */
VectorNMI = 2, /* non-maskable interrupt */
--- a/sys/src/9/pc/main.c
+++ b/sys/src/9/pc/main.c
@@ -569,7 +569,7 @@
mathinit(void)
{trapenable(VectorCERR, matherror, 0, "matherror");
- if(X86FAMILY(m->cpuidax) == 3)
+ if(m->cpuidfamily == 3)
intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
trapenable(VectorCNA, mathemu, 0, "mathemu");
trapenable(VectorCSO, mathover, 0, "mathover");
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -198,7 +198,7 @@
void
flushpg(ulong va)
{- if(X86FAMILY(m->cpuidax) >= 4)
+ if(m->cpuidfamily >= 4)
invlpg(va);
else
putcr3(getcr3());
--- a/sys/src/9/pc/mp.c
+++ b/sys/src/9/pc/mp.c
@@ -216,7 +216,7 @@
* set conf.copymode here if nmach > 1.
* Should look for an ExtINT line and enable it.
*/
- if(X86FAMILY(m->cpuidax) == 3 || conf.nmach > 1)
+ if(m->cpuidfamily == 3 || conf.nmach > 1)
conf.copymode = 1;
}