shithub: riscv

Download patch

ref: 54562b6ac2f88c6a29264bb20e1fa5292f6ee8b9
parent: 97a2f14b1c7960713ba2f7b284a6055cda8e101e
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Wed May 1 05:35:51 EDT 2019

kernel: insert memory barrier in the scheduler before setting up->mach = nil

we have to ensure that all stores saving the process state
have completed before setting up->mach = nil in the scheduler.
otherwise, another cpu could observe up->mach == nil while
the stores such as the processes p->sched label have not finnished.

--- a/sys/src/9/port/proc.c
+++ b/sys/src/9/port/proc.c
@@ -70,6 +70,9 @@
 			edfrecord(up);
 		m->proc = nil;
 		switch(up->state) {
+		default:
+			updatecpu(up);
+			break;
 		case Running:
 			ready(up);
 			break;
@@ -88,8 +91,8 @@
 			mmurelease(up);
 			unlock(&palloc);
 
-			up->mach = nil;
 			updatecpu(up);
+			up->mach = nil;
 
 			up->qnext = procalloc.free;
 			procalloc.free = up;
@@ -99,8 +102,8 @@
 			unlock(&procalloc);
 			sched();
 		}
+		coherence();
 		up->mach = nil;
-		updatecpu(up);
 		up = nil;
 	}
 	sched();