shithub: riscv

Download patch

ref: 5fe33fb80804cadc3c934337fde81af5b7d44243
parent: 0ec381a846c6c0a8ad7177ddcbced27286d238e1
author: Jacob Moody <moody@posixcafe.org>
date: Sat Mar 30 14:58:36 EDT 2024

/sys/src: power64 target

--- /dev/null
+++ b/power64/include/ape/float.h
@@ -1,0 +1,73 @@
+#ifndef __FLOAT
+#define __FLOAT
+/* IEEE, default rounding */
+
+#define FLT_ROUNDS	1
+#define FLT_RADIX	2
+
+#define FLT_DIG		6
+#define FLT_EPSILON	1.19209290e-07
+#define FLT_MANT_DIG	24
+#define FLT_MAX		3.40282347e+38
+#define FLT_MAX_10_EXP	38
+#define FLT_MAX_EXP	128
+#define FLT_MIN		1.17549435e-38
+#define FLT_MIN_10_EXP	-37
+#define FLT_MIN_EXP	-125
+
+#define DBL_DIG		15
+#define DBL_EPSILON	2.2204460492503131e-16
+#define DBL_MANT_DIG	53
+#define DBL_MAX		1.797693134862315708145e+308
+#define DBL_MAX_10_EXP	308
+#define DBL_MAX_EXP	1024
+#define DBL_MIN		2.225073858507201383090233e-308
+#define DBL_MIN_10_EXP	-307
+#define DBL_MIN_EXP	-1021
+#define LDBL_MANT_DIG	DBL_MANT_DIG
+#define LDBL_EPSILON	DBL_EPSILON
+#define LDBL_DIG	DBL_DIG
+#define LDBL_MIN_EXP	DBL_MIN_EXP
+#define LDBL_MIN	DBL_MIN
+#define LDBL_MIN_10_EXP	DBL_MIN_10_EXP
+#define LDBL_MAX_EXP	DBL_MAX_EXP
+#define LDBL_MAX	DBL_MAX
+#define LDBL_MAX_10_EXP	DBL_MAX_10_EXP
+
+typedef 	union FPdbleword FPdbleword;
+union FPdbleword
+{
+	double	x;
+	struct {	/* big endian */
+		long hi;
+		long lo;
+	};
+};
+
+#ifdef _RESEARCH_SOURCE
+/* define stuff needed for floating conversion */
+#define IEEE_MC68k	1
+#define Sudden_Underflow 1
+#endif
+#ifdef _PLAN9_SOURCE
+/* FCR */
+#define	FPINEX	(1<<7)
+#define	FPOVFL	(1<<9)
+#define	FPUNFL	(1<<8)
+#define	FPZDIV	(1<<10)
+#define	FPRNR	(0<<0)
+#define	FPRZ	(1<<0)
+#define	FPRPINF	(2<<0)
+#define	FPRNINF	(3<<0)
+#define	FPRMASK	(3<<0)
+#define	FPPEXT	0
+#define	FPPSGL	0
+#define	FPPDBL	0
+#define	FPPMASK	0
+/* FSR */
+#define	FPAINEX	(1<<2)
+#define	FPAOVFL	(1<<4)
+#define	FPAUNFL	(1<<3)
+#define	FPAZDIV	(1<<5)
+#endif
+#endif /* __FLOAT */
--- /dev/null
+++ b/power64/include/ape/math.h
@@ -1,0 +1,78 @@
+#ifndef __MATH
+#define __MATH
+#pragma lib "/$M/lib/ape/libap.a"
+
+/* a HUGE_VAL appropriate for IEEE double-precision */
+/* the correct value, 1.797693134862316e+308, causes a ken overflow */
+#define HUGE_VAL 1.79769313486231e+308
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern double acos(double);
+extern double asin(double);
+extern double atan(double);
+extern double atan2(double, double);
+extern double cos(double);
+extern double hypot(double, double);
+extern double sin(double);
+extern double tan(double);
+extern double cosh(double);
+extern double sinh(double);
+extern double tanh(double);
+extern double exp(double);
+extern double frexp(double, int *);
+extern double ldexp(double, int);
+extern double log(double);
+extern double log10(double);
+extern double modf(double, double *);
+extern double pow(double, double);
+extern double sqrt(double);
+extern double ceil(double);
+extern double fabs(double);
+extern double floor(double);
+extern double fmod(double, double);
+extern double NaN(void);
+extern int isNaN(double);
+extern double Inf(int);
+extern int isInf(double, int);
+
+#ifdef _RESEARCH_SOURCE
+/* does >> treat left operand as unsigned ? */
+#define Unsigned_Shifts 1
+#define	M_E		2.7182818284590452354	/* e */
+#define	M_LOG2E		1.4426950408889634074	/* log 2e */
+#define	M_LOG10E	0.43429448190325182765	/* log 10e */
+#define	M_LN2		0.69314718055994530942	/* log e2 */
+#define	M_LN10		2.30258509299404568402	/* log e10 */
+#define	M_PI		3.14159265358979323846	/* pi */
+#define	M_PI_2		1.57079632679489661923	/* pi/2 */
+#define	M_PI_4		0.78539816339744830962	/* pi/4 */
+#define	M_1_PI		0.31830988618379067154	/* 1/pi */
+#define	M_2_PI		0.63661977236758134308	/* 2/pi */
+#define	M_2_SQRTPI	1.12837916709551257390	/* 2/sqrt(pi) */
+#define	M_SQRT2		1.41421356237309504880	/* sqrt(2) */
+#define	M_SQRT1_2	0.70710678118654752440	/* 1/sqrt(2) */
+
+extern double hypot(double, double);
+extern double erf(double);
+extern double erfc(double);
+extern double j0(double);
+extern double y0(double);
+extern double j1(double);
+extern double y1(double);
+extern double jn(int, double);
+extern double yn(int, double);
+
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#define isnan(x) isNaN(x)
+#define isinf(x) isInf(x, 0)
+
+#endif /* __MATH */
--- /dev/null
+++ b/power64/include/ape/stdarg.h
@@ -1,0 +1,11 @@
+#ifndef __STDARG
+#define __STDARG
+
+typedef char *va_list;
+
+#define va_start(list, start) list = (char *)(&(start)+1)
+#define va_end(list)
+#define va_arg(list, mode) (sizeof(mode)==1 ? ((mode *) (list += 4))[-4] : \
+sizeof(mode)==2 ? ((mode *) (list += 4))[-2] : ((mode *) (list += sizeof(mode)))[-1])
+
+#endif /* __STDARG */
--- /dev/null
+++ b/power64/include/ape/ureg.h
@@ -1,0 +1,50 @@
+#ifndef __UREG_H
+#define __UREG_H
+#if !defined(_PLAN9_SOURCE)
+    This header file is an extension to ANSI/POSIX
+#endif
+
+struct Ureg
+{	unsigned long	cause;
+	union { unsigned long	srr1; unsigned long status;};
+	unsigned long	pc;	/* SRR0 */
+	unsigned long	pad;
+	unsigned long	lr;
+	unsigned long	cr;
+	unsigned long	xer;
+	unsigned long	ctr;
+	unsigned long	r0;
+	union{ unsigned long r1;	unsigned long	sp;	unsigned long	usp; };
+	unsigned long	r2;
+	unsigned long	r3;
+	unsigned long	r4;
+	unsigned long	r5;
+	unsigned long	r6;
+	unsigned long	r7;
+	unsigned long	r8;
+	unsigned long	r9;
+	unsigned long	r10;
+	unsigned long	r11;
+	unsigned long	r12;
+	unsigned long	r13;
+	unsigned long	r14;
+	unsigned long	r15;
+	unsigned long	r16;
+	unsigned long	r17;
+	unsigned long	r18;
+	unsigned long	r19;
+	unsigned long	r20;
+	unsigned long	r21;
+	unsigned long	r22;
+	unsigned long	r23;
+	unsigned long	r24;
+	unsigned long	r25;
+	unsigned long	r26;
+	unsigned long	r27;
+	unsigned long	r28;
+	unsigned long	r29;
+	unsigned long	r30;
+	unsigned long	r31;
+};
+
+#endif
--- /dev/null
+++ b/sys/src/ape/lib/9/power64/getcallerpc.s
@@ -1,0 +1,3 @@
+TEXT	getcallerpc(SB), $-4
+	MOVD	0(R1), R3
+	RETURN
--- /dev/null
+++ b/sys/src/ape/lib/9/power64/getfcr.s
@@ -1,0 +1,27 @@
+TEXT	getfcr(SB), $8
+	MOVFL	FPSCR, F3
+	FMOVD	F3, f-8(SP)
+	MOVW	-4(SP), R3
+	RETURN
+
+TEXT	getfsr(SB), $8
+	MOVFL	FPSCR, F3
+	FMOVD	F3, f-8(SP)
+	MOVW	-4(SP), R3
+	RETURN
+
+TEXT	setfcr(SB), $8
+	SYNC
+	MOVW	R3, -4(SP)
+	FMOVD	-8(SP), F3
+	MOVFL	F3, FPSCR
+	ISYNC
+	RETURN
+
+TEXT	setfsr(SB), $8
+	SYNC
+	MOVW	R3, -4(SP)
+	FMOVD	-8(SP), F3
+	MOVFL	F3, FPSCR
+	ISYNC
+	RETURN
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/_seek.c
@@ -1,0 +1,11 @@
+extern long __SEEK(long long*, int, long long, int);
+
+long long
+_SEEK(int fd, long long o, int p)
+{
+	long long l;
+
+	if(__SEEK(&l, fd, o, p) < 0)
+		l = -1;
+	return l;
+}
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/argv0.s
@@ -1,0 +1,4 @@
+GLOBL	argv0(SB), $8
+GLOBL	_tos(SB), $8
+GLOBL	_privates(SB), $8
+GLOBL	_nprivates(SB), $4
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/atom.s
@@ -1,0 +1,34 @@
+TEXT ainc(SB), 1, $-4				/* long ainc(long *); */
+	BR	_trap
+	RET
+
+TEXT adec(SB), 1, $-4				/* long adec(long*); */
+	BR	_trap
+	RET
+
+TEXT _xinc(SB), 1, $-4				/* void _xinc(long *); */
+	BR	_trap
+	RET
+
+TEXT _xdec(SB), 1, $-4				/* long _xdec(long *); */
+	BR	_trap
+	RET
+
+/*
+ * int cas(uint* p, int ov, int nv);
+ */
+TEXT cas(SB), 1, $-4
+	BR	_trap
+	RET
+
+/*
+ * int casv(u64int* p, u64int ov, u64int nv);
+ */
+TEXT casv(SB), 1, $-4
+	BR	_trap
+	RET
+
+_trap:
+	MOVD	$0, R0
+	MOVD	0(R0), R0
+	RET
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/lock.c
@@ -1,0 +1,44 @@
+#define _LOCK_EXTENSION
+#include "../plan9/sys9.h"
+#include <lock.h>
+
+int tas(int*);	/* tas.s */
+
+void
+lock(Lock *lk)
+{
+	int i;
+
+	/* once fast */
+	if(!tas(&lk->val))
+		return;
+	/* a thousand times pretty fast */
+	for(i=0; i<1000; i++){
+		if(!tas(&lk->val))
+			return;
+		sleep(0);
+	}
+	/* now nice and slow */
+	for(i=0; i<1000; i++){
+		if(!tas(&lk->val))
+			return;
+		sleep(100);
+	}
+	/* take your time */
+	while(tas(&lk->val))
+		sleep(1000);
+}
+
+int
+canlock(Lock *lk)
+{
+	if(tas(&lk->val))
+		return 0;
+	return 1;
+}
+
+void
+unlock(Lock *lk)
+{
+	lk->val = 0;
+}
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/main9.s
@@ -1,0 +1,21 @@
+#define NPRIVATES	16
+
+GLOBL	_plan9err(SB), $4
+
+TEXT	_main(SB), 1, $(2*8 + NPRIVATES*8)
+
+	MOVD	$setSB(SB), R2
+	MOVD	R3, _tos(SB)
+
+	MOVD	$p-64(SP), R4
+	MOVD	R4, _privates+0(SB)
+	MOVW	$16, R4
+	MOVW	R4, _nprivates+0(SB)
+
+	MOVW	inargc-8(FP), R3
+	MOVD	$inargv+0(FP), R4
+	MOVW	R4, 16(R1)
+	BL	main(SB)
+loop:
+	BL	exit(SB)
+	BR	loop
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/mkfile
@@ -1,0 +1,15 @@
+APE=/sys/src/ape
+<$APE/config
+LIB=/$objtype/lib/ape/libap.a
+OFILES=\
+	_seek.$O\
+	tas.$O\
+	lock.$O\
+	notetramp.$O\
+	setjmp.$O\
+	argv0.$O\
+	main9.$O\
+
+</sys/src/cmd/mksyslib
+
+CFLAGS=-c -D_POSIX_SOURCE -D_PLAN9_SOURCE
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/notetramp.c
@@ -1,0 +1,72 @@
+#include "../plan9/lib.h"
+#include "../plan9/sys9.h"
+#include <signal.h>
+#include <setjmp.h>
+
+/* A stack to hold pcs when signals nest */
+#define MAXSIGSTACK 20
+typedef struct Pcstack Pcstack;
+static struct Pcstack {
+	int sig;
+	void (*hdlr)(int, char*, Ureg*);
+	unsigned long long restorepc;
+	Ureg *u;
+} pcstack[MAXSIGSTACK];
+static int nstack = 0;
+
+static void notecont(Ureg*, char*);
+
+void
+_notetramp(int sig, void (*hdlr)(int, char*, Ureg*), Ureg *u)
+{
+	Pcstack *p;
+
+	if(nstack >= MAXSIGSTACK)
+		_NOTED(1);	/* nesting too deep; just do system default */
+	p = &pcstack[nstack];
+	p->restorepc = u->pc;
+	p->sig = sig;
+	p->hdlr = hdlr;
+	p->u = u;
+	nstack++;
+	u->pc = (unsigned long long) notecont;
+	_NOTED(2);	/* NSAVE: clear note but hold state */
+}
+
+static void
+notecont(Ureg *u, char *s)
+{
+	Pcstack *p;
+	void(*f)(int, char*, Ureg*);
+
+	p = &pcstack[nstack-1];
+	f = p->hdlr;
+	u->pc = p->restorepc;
+	nstack--;
+	(*f)(p->sig, s, u);
+	_NOTED(3);	/* NRSTR */
+}
+
+#define JMPBUFPC 1
+#define JMPBUFSP 0
+
+extern sigset_t	_psigblocked;
+
+void
+siglongjmp(sigjmp_buf j, int ret)
+{
+	struct Ureg *u;
+
+	if(j[0])
+		_psigblocked = j[1];
+	if(nstack == 0 || pcstack[nstack-1].u->sp > j[2+JMPBUFSP])
+		longjmp(j+2, ret);
+	u = pcstack[nstack-1].u;
+	nstack--;
+	u->r0 = ret;
+	if(ret == 0)
+		u->r0 = 1;
+	u->pc = j[2+JMPBUFPC];
+	u->sp = j[2+JMPBUFSP];
+	_NOTED(3);	/* NRSTR */
+}
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/setjmp.s
@@ -1,0 +1,37 @@
+TEXT	setjmp(SB), 1, $-8
+	MOVD	LR, R4
+	MOVD	R1, (R3)
+	MOVD	R4, 4(R3)
+	MOVW	$0, R3
+	RETURN
+
+TEXT	sigsetjmp(SB), 1, $-4
+	MOVW	savemask+4(FP), R4
+	MOVW	R4, 0(R3)
+	MOVW	$_psigblocked(SB), R4
+	MOVW	R4, 4(R3)
+	MOVW	LR, R4
+	MOVW	R1, 8(R3)
+	MOVW	R4, 12(R3)
+	MOVW	$0, R3
+	RETURN
+
+TEXT	longjmp(SB), 1, $-8
+	MOVD	R3, R4
+	MOVW	r+12(FP), R3
+	CMP	R3, $0
+	BNE	ok		/* ansi: "longjmp(0) => longjmp(1)" */
+	MOVW	$1, R3		/* bless their pointed heads */
+ok:	MOVD	(R4), R1
+	MOVD	4(R4), R4
+	MOVD	R4, LR
+	BR	(LR)
+
+/*
+ * trampoline functions because the kernel smashes r3
+ * in the uregs given to notejmp
+ */
+TEXT	__noterestore(SB), 1, $-8
+	MOVD	R4, R3
+	MOVD	R5, LR
+	BR	(LR)
--- /dev/null
+++ b/sys/src/ape/lib/ap/power64/tas.s
@@ -1,0 +1,19 @@
+TEXT	tas(SB), $0
+	SYNC
+	MOVD	R3, R4
+	MOVWZ	$0xdeaddead,R5
+tas1:
+/* taken out for the 755.  dcbf and L2 caching do not seem to get on
+    with eachother.  It seems that dcbf is desctructive in the L2 cache 
+    (also see l.s) */
+//	DCBF	(R4)	
+	SYNC
+	LWAR	(R4), R3
+	CMP	R3, $0
+	BNE	tas0
+	STWCCC	R5, (R4)
+	BNE	tas1
+tas0:
+	SYNC
+	ISYNC
+	RETURN
--- /dev/null
+++ b/sys/src/ape/lib/mp/power64/mkfile
@@ -1,0 +1,16 @@
+APE=/sys/src/ape
+<$APE/config
+
+LIB=/$objtype/lib/ape/libmp.a
+
+HFILES=\
+	/sys/include/ape/mp.h\
+	../../../../libmp/port/dat.h
+
+UPDATE=mkfile\
+	$HFILES\
+
+</sys/src/cmd/mksyslib
+
+%.$O:	../../../../libmp/power64/%.s
+	$AS ../../../../libmp/power64/$stem.s
--- /dev/null
+++ b/sys/src/ape/lib/sec/power64/mkfile
@@ -1,0 +1,15 @@
+APE=/sys/src/ape
+<$APE/config
+
+LIB=/$objtype/lib/ape/libsec.a
+OFILES=\
+
+HFILES=/sys/include/ape/libsec.h
+
+UPDATE=mkfile\
+	$HFILES\
+
+</sys/src/cmd/mksyslib
+
+%.$O:	/sys/src/libsec/$objtype/%.s
+	$AS $AFLAGS /sys/src/libsec/$objtype/$stem.s
--- a/sys/src/cmd/gs/arch.h
+++ b/sys/src/cmd/gs/arch.h
@@ -7,7 +7,9 @@
 #elif Tspim
 #include "spim.h"
 #elif Tpower
-#include "mips.h"
+#include "power.h"
+#elif Tpower64
+#include "power64.h"
 #elif Tarm
 #include "arm.h"
 #elif Tarm64
--- /dev/null
+++ b/sys/src/cmd/gs/default.power64.h
@@ -1,0 +1,44 @@
+/* Parameters derived from machine and compiler architecture */
+
+	 /* ---------------- Scalar alignments ---------------- */
+
+#define ARCH_ALIGN_SHORT_MOD 2
+#define ARCH_ALIGN_INT_MOD 4
+#define ARCH_ALIGN_LONG_MOD 4
+#define ARCH_ALIGN_PTR_MOD 8
+#define ARCH_ALIGN_FLOAT_MOD 4
+#define ARCH_ALIGN_DOUBLE_MOD 8
+#define ARCH_ALIGN_STRUCT_MOD 8
+
+	 /* ---------------- Scalar sizes ---------------- */
+
+#define ARCH_LOG2_SIZEOF_SHORT 1
+#define ARCH_LOG2_SIZEOF_INT 2
+#define ARCH_LOG2_SIZEOF_LONG 2
+#define ARCH_LOG2_SIZEOF_LONG_LONG 3
+#define ARCH_SIZEOF_PTR 8
+#define ARCH_SIZEOF_FLOAT 4
+#define ARCH_SIZEOF_DOUBLE 8
+#define ARCH_FLOAT_MANTISSA_BITS 24
+#define ARCH_DOUBLE_MANTISSA_BITS 53
+
+	 /* ---------------- Unsigned max values ---------------- */
+
+#define ARCH_MAX_UCHAR ((unsigned char)0xff + (unsigned char)0)
+#define ARCH_MAX_USHORT ((unsigned short)0xffff + (unsigned short)0)
+#define ARCH_MAX_UINT ((unsigned int)~0 + (unsigned int)0)
+#define ARCH_MAX_ULONG ((unsigned long)~0L + (unsigned long)0)
+
+	 /* ---------------- Cache sizes ---------------- */
+
+#define ARCH_CACHE1_SIZE 1048576
+#define ARCH_CACHE2_SIZE 1048576
+
+	 /* ---------------- Miscellaneous ---------------- */
+
+#define ARCH_IS_BIG_ENDIAN 1
+#define ARCH_PTRS_ARE_SIGNED 0
+#define ARCH_FLOATS_ARE_IEEE 1
+#define ARCH_ARITH_RSHIFT 2
+#define ARCH_CAN_SHIFT_FULL_LONG 1
+#define ARCH_DIV_NEG_POS_TRUNCATES 1
--- a/sys/src/libc/9syscall/mkfile
+++ b/sys/src/libc/9syscall/mkfile
@@ -128,6 +128,15 @@
 				MOVW R3,4(R8)'
 			}
 			echo RETURN
+		case power64
+			if(~ $i seek)
+				echo TEXT _seek'(SB)', 1, '$0'
+			if not
+				echo TEXT $i'(SB)', 1, '$0'
+			echo MOVD R3, '0(FP)'
+			echo MOVW '$'$n, R3
+			echo SYSCALL
+			echo RETURN
 		case alpha
 			j=$i
 			if(~ $i seek) j=_seek
--- /dev/null
+++ b/sys/src/libc/power64/_seek.c
@@ -1,0 +1,14 @@
+#include <u.h>
+#include <libc.h>
+
+extern int _seek(vlong*, int, vlong, int);
+
+vlong
+seek(int fd, vlong o, int p)
+{
+	vlong l;
+
+	if(_seek(&l, fd, o, p) < 0)
+		l = -1LL;
+	return l;
+}
--- /dev/null
+++ b/sys/src/libc/power64/argv0.s
@@ -1,0 +1,4 @@
+GLOBL	argv0(SB), $8
+GLOBL	_tos(SB), $8
+GLOBL	_privates(SB), $8
+GLOBL	_nprivates(SB), $4
--- /dev/null
+++ b/sys/src/libc/power64/atom.s
@@ -1,0 +1,17 @@
+/* stubs */
+TEXT ainc(SB), 1, $-4				/* long ainc(long *); */
+TEXT adec(SB), 1, $-4				/* long adec(long*); */
+/*
+ * int cas(uint* p, int ov, int nv);
+ */
+TEXT cas(SB), 1, $-4
+/*
+ * int casv(u64int* p, u64int ov, u64int nv);
+ */
+TEXT casv(SB), 1, $-4
+	BR	_trap
+	RETURN
+_trap:
+	MOVD	$0, R0
+	MOVD	0(R0), R0
+	RETURN
--- /dev/null
+++ b/sys/src/libc/power64/cycles.s
@@ -1,0 +1,17 @@
+#define TBRL	268
+#define TBRU	269		/* Time base Upper/Lower (Reading) */
+
+/*
+ * time stamp counter; _cycles since power up
+ * Runs at fasthz/4 cycles per second (m->clkin>>3)
+ */
+TEXT cycles(SB),1,$0
+loop:
+	MOVW	SPR(TBRU),R7
+	MOVW	SPR(TBRL),R8
+	MOVW	SPR(TBRU),R5
+	CMP	R5,R7
+	BNE	loop
+	MOVW	R7,0(R3)
+	MOVW	R8,4(R3)
+	RETURN
--- /dev/null
+++ b/sys/src/libc/power64/getcallerpc.s
@@ -1,0 +1,4 @@
+TEXT	getcallerpc(SB),1,$-8
+	MOVD	0(R1), R3
+	RETURN
+
--- /dev/null
+++ b/sys/src/libc/power64/getfcr.s
@@ -1,0 +1,28 @@
+TEXT	getfcr(SB), $8
+	MOVFL	FPSCR, F3
+	FMOVD	F3, f-8(SP)
+	MOVW	-4(SP), R3
+	RETURN
+
+TEXT	getfsr(SB), $8
+	MOVFL	FPSCR, F3
+	FMOVD	F3, f-8(SP)
+	MOVW	-4(SP), R3
+	RETURN
+
+TEXT	setfcr(SB), $8
+	SYNC
+	MOVW	R3, -4(SP)
+	FMOVD	-8(SP), F3
+	MOVFL	F3, FPSCR
+	ISYNC
+	RETURN
+
+TEXT	setfsr(SB), $8
+	SYNC
+	MOVW	R3, -4(SP)
+	FMOVD	-8(SP), F3
+	MOVFL	F3, FPSCR
+	ISYNC
+	RETURN
+
--- /dev/null
+++ b/sys/src/libc/power64/main9.s
@@ -1,0 +1,23 @@
+#define NPRIVATES	16
+
+TEXT	_main(SB), 1, $(2*8 + NPRIVATES*8)
+
+	MOVD	$setSB(SB), R2
+	MOVD	R3, _tos(SB)
+
+	MOVD	$p-64(SP), R4
+	MOVD	R4, _privates+0(SB)
+	MOVW	$16, R4
+	MOVW	R4, _nprivates+0(SB)
+
+	MOVW	inargc-8(FP), R3
+	MOVD	$inargv+0(FP), R4
+	MOVW	R4, 16(R1)
+	BL	main(SB)
+loop:
+	MOVD	$_exitstr<>(SB), R3
+	BL	exits(SB)
+	BR	loop
+
+DATA	_exitstr<>+0(SB)/4, $"main"
+GLOBL	_exitstr<>+0(SB), $5
--- /dev/null
+++ b/sys/src/libc/power64/main9p.s
@@ -1,0 +1,36 @@
+#define NPRIVATES	16
+
+TEXT	_mainp(SB), 1, $(2*8 + NPRIVATES*8)
+
+	MOVD	$setSB(SB), R2
+	MOVD	R3, _tos(SB)
+
+	MOVD	$p-64(SP), R4
+	MOVD	R4, _privates+0(SB)
+	MOVW	$16, R4
+	MOVW	R4, _nprivates+0(SB)
+
+	BL		_profmain(SB)
+	MOVD	_tos(SB), R3
+	MOVD	8(R3), R4
+	MOVD	R4, 0(R3)
+	MOVW	inargc-4(FP), R3
+	MOVD	$inargv+0(FP), R4
+	MOVD	R4, 16(R1)
+	BL		main(SB)
+loop:
+	MOVD	$exits<>(SB), R3
+	BL	exits(SB)
+	MOVD	$_profin(SB), R3	/* force loading of profile */
+	BR	loop
+
+TEXT	_savearg(SB), 1, $0
+TEXT	_saveret(SB), 1, $0
+	RETURN
+
+TEXT	_callpc(SB), 1, $0
+	MOVD	argp-8(FP), R3
+	RETURN
+
+DATA	exits<>+0(SB)/4, $"main"
+GLOBL	exits<>+0(SB), $5
--- /dev/null
+++ b/sys/src/libc/power64/mkfile
@@ -1,0 +1,29 @@
+objtype=power64
+</$objtype/mkfile
+
+LIB=/$objtype/lib/libc.a
+SFILES=\
+	argv0.s\
+	cycles.s\
+	getcallerpc.s\
+	getfcr.s\
+	main9.s\
+	atom.s\
+	main9p.s\
+	setjmp.s\
+	tas.s\
+
+CFILES=\
+	_seek.c\
+	notejmp.c\
+
+HFILES=/sys/include/libc.h
+
+OFILES=${CFILES:%.c=%.$O} ${SFILES:%.s=%.$O}
+
+UPDATE=mkfile\
+	$HFILES\
+	$CFILES\
+	$SFILES\
+
+</sys/src/cmd/mksyslib
--- /dev/null
+++ b/sys/src/libc/power64/notejmp.c
@@ -1,0 +1,22 @@
+#include <u.h>
+#include <libc.h>
+#include <ureg.h>
+
+int	__noterestore(void);
+
+void
+notejmp(void *vr, jmp_buf j, int ret)
+{
+	struct Ureg *r = vr;
+
+	/*
+	 * song and dance to get around the kernel smashing r3 in noted
+	 */
+	r->r4 = ret;
+	if(ret == 0)
+		r->r4 = 1;
+	r->r5 = j[JMPBUFPC] - JMPBUFDPC;
+	r->pc = (uintptr)__noterestore;
+	r->sp = j[JMPBUFSP];
+	noted(NCONT);
+}
--- /dev/null
+++ b/sys/src/libc/power64/setjmp.s
@@ -1,0 +1,26 @@
+TEXT	setjmp(SB), 1, $-8
+	MOVD	LR, R4
+	MOVD	R1, (R3)
+	MOVD	R4, 4(R3)
+	MOVW	$0, R3
+	RETURN
+
+TEXT	longjmp(SB), 1, $-8
+	MOVD	R3, R4
+	MOVW	r+12(FP), R3
+	CMP	R3, $0
+	BNE	ok		/* ansi: "longjmp(0) => longjmp(1)" */
+	MOVW	$1, R3		/* bless their pointed heads */
+ok:	MOVD	(R4), R1
+	MOVD	4(R4), R4
+	MOVD	R4, LR
+	BR	(LR)
+
+/*
+ * trampoline functions because the kernel smashes r3
+ * in the uregs given to notejmp
+ */
+TEXT	__noterestore(SB), 1, $-8
+	MOVD	R4, R3
+	MOVD	R5, LR
+	BR	(LR)
--- /dev/null
+++ b/sys/src/libc/power64/tas.s
@@ -1,0 +1,19 @@
+TEXT	_tas(SB), $0
+	SYNC
+	MOVD	R3, R4
+	MOVWZ	$0xdeaddead,R5
+tas1:
+/* taken out for the 755.  dcbf and L2 caching do not seem to get on
+    with eachother.  It seems that dcbf is desctructive in the L2 cache 
+    (also see l.s) */
+//	DCBF	(R4)	
+	SYNC
+	LWAR	(R4), R3
+	CMP	R3, $0
+	BNE	tas0
+	STWCCC	R5, (R4)
+	BNE	tas1
+tas0:
+	SYNC
+	ISYNC
+	RETURN
--- /dev/null
+++ b/sys/src/libmp/power64/mkfile
@@ -1,0 +1,13 @@
+objtype=power64
+</power/mkfile
+
+LIB=/$objtype/lib/libmp.a
+OFILES=\
+
+HFILES=/$objtype/include/u.h /sys/include/mp.h ../port/dat.h
+
+UPDATE=\
+	mkfile\
+	$HFILES\
+
+</sys/src/cmd/mksyslib
--- /dev/null
+++ b/sys/src/libsec/power64/mkfile
@@ -1,0 +1,11 @@
+objtype=power64
+</$objtype/mkfile
+
+LIB=/$objtype/lib/libsec.a
+OFILES=	\
+
+HFILES=/sys/include/libsec.h
+
+UPDATE=mkfile
+
+</sys/src/cmd/mksyslib
--- /dev/null
+++ b/sys/src/libthread/power64.c
@@ -1,0 +1,26 @@
+#include <u.h>
+#include <libc.h>
+#include <thread.h>
+#include "threadimpl.h"
+
+/* first argument goes in a register; simplest just to ignore it */
+static void
+launcherpower64(int, void (*f)(void *arg), void *arg)
+{
+	(*f)(arg);
+	threadexits(nil);
+}
+
+void
+_threadinitstack(Thread *t, void (*f)(void*), void *arg)
+{
+	uvlong *tos;
+
+	tos = (uvlong*)&t->stk[t->stksize&~7];
+	*--tos = (uvlong)arg;
+	*--tos = (uvlong)f;
+	*--tos = 0;	/* first arg to launcherpower64 */
+	*--tos = 0;	/* place to store return PC */
+	t->sched[JMPBUFPC] = (uvlong)launcherpower64+JMPBUFDPC;
+	t->sched[JMPBUFSP] = (uvlong)tos;
+}
--- a/sys/src/mkfile.proto
+++ b/sys/src/mkfile.proto
@@ -2,8 +2,8 @@
 # common mkfile parameters shared by all architectures
 #
 
-OS=05678qvt
-CPUS=spim arm arm64 amd64 386 power mips
+OS=056789qvt
+CPUS=spim arm arm64 amd64 386 power power64 mips
 CFLAGS=-FTVw
 LEX=lex
 YACC=yacc