shithub: riscv

Download patch

ref: 752841fcc1831444ba96dc4ff72c58d66b77f958
parent: 15afb9d00b50c5d362ffcb387d7e6e4054192eff
author: aiju <devnull@localhost>
date: Sun Sep 28 15:41:52 EDT 2014 

games/gba: small fixes


--- a/sys/src/games/gba/cpu.c
+++ b/sys/src/games/gba/cpu.c
@@ -238,7 +238,7 @@
 			addr = r[Rn];
 			if((instr & 0x0ffffff0) == 0x012fff10){
 				r[14] = r[15] - 4;
-				r[15] = r[Rm];
+				r[15] = r[Rm] & ~1;
 				setcpsr(cpsr | FLAGT);
 				pipeflush();
 			}else if((instr & BYTE) != 0){
@@ -253,7 +253,7 @@
 					sh = (addr & 3) << 2;
 					val = val >> sh | val << 32 - sh;
 				}
-				memwrite(addr, r[Rm], 4);
+				memwrite(addr & ~3, r[Rm], 4);
 				r[Rd] = val;	
 			}
 		}else{
@@ -935,7 +935,7 @@
 			if(b != 0){
 				if(b < 32){
 					c = v >> b - 1;
-					v >>= b;
+					v = (int)v >> b;
 				}else
 					c = v = -((int)v < 0);
 				cpsr = cpsr & ~FLAGC | c << 29 & FLAGC;
@@ -1084,7 +1084,7 @@
 	off += r[Rb];
 	if(load){
 		io();
-		v = memread(off & ~(size - 1), size, 0);
+		v = memread(off & -size, size, 0);
 		if(sx)
 			if(size == 2)
 				v = ((int)(v << 16)) >> 16;
@@ -1096,7 +1096,7 @@
 		}
 		r[Rd] = v;
 	}else
-		memwrite(off, r[Rd], size);
+		memwrite(off & -size, r[Rd], size);
 }
 
 static void
--- a/sys/src/games/gba/gba.c
+++ b/sys/src/games/gba/gba.c
@@ -283,6 +283,7 @@
 				break;
 			}
 		}
+		k &= ~(k << 1 & 0xa0 | k >> 1 & 0x50);
 		keys = k;
 	}
 
--- a/sys/src/games/gba/mem.c
+++ b/sys/src/games/gba/mem.c
@@ -128,6 +128,10 @@
 		*p &= ~v;
 		setif(0);
 		return;
+	case IME*2: case IE*2:
+		*p = v;
+		setif(0);
+		return;
 	case BLDALPHA*2:
 		blda = v & 0x1f;
 		if(blda > 16)
@@ -142,8 +146,8 @@
 			bldy = 16;
 		break;
 	case DMA0CNTH*2: case DMA1CNTH*2: case DMA2CNTH*2: case DMA3CNTH*2:
-		if((*p & DMAEN) == 0 && (v & DMAEN) != 0){
-			i = (a - DMA0CNTH*2) / 12;
+		i = (a - DMA0CNTH*2) / 12;
+		if((v & DMAEN) != 0){
 			if((v >> DMAWHEN & 3) == 0)
 				dmaact |= 1<<i;
 			if(i == 3 && (v >> DMAWHEN & 3) == 3)
@@ -151,15 +155,13 @@
 			dmar[4*i + DMASRC] = p[-5] | p[-4] << 16;
 			dmar[4*i + DMADST] = p[-3] | p[-2] << 16;
 			dmar[4*i + DMACNT] = p[-1];
-		}
+		}else
+			dmaact &= ~1<<i;
 		break;
 	case 0x102: case 0x106: case 0x10a: case 0x10e:
 		if((*p & 1<<7) == 0 && (v & 1<<7) != 0)
 			tim[(a-0x102)/4] = p[-1];
 		break;
-	case IME*2: case IE*2:
-		setif(0);
-		break;
 	case WAITCNT*2:
 		waitst[3] = waitst[7] = ws0[v & 3];
 		waitst[0] = ws0[v >> 2 & 3];
@@ -196,13 +198,9 @@
 		regwrite16(a, w);
 		break;
 	default:
-		if((a & 1) != 0)
-			sysfatal("unaligned register access");
 		regwrite16(a, v);
 		break;
 	case 4:
-		if((a & 1) != 0)
-			sysfatal("unaligned register access");
 		regwrite16(a, v);
 		regwrite16(a + 2, v >> 16);
 		break;
@@ -277,7 +275,7 @@
 		return 0;
 	default:
 	fault:
-		sysfatal("read from %#.8ux (pc=%#.8ux)", a, curpc);
+		print("read from %#.8ux (pc=%#.8ux)\n", a, curpc);
 		return 0;
 	}
 }
@@ -346,7 +344,7 @@
 		return;
 	default:
 	fault:
-		sysfatal("write to %#.8ux, value %#.8ux (pc=%#.8ux)", a, v, curpc);
+		print("write to %#.8ux, value %#.8ux (pc=%#.8ux)\n", a, v, curpc);
 	}
 }