shithub: riscv

Download patch

ref: 994cbd04b19eceb893b8252c881993c4342d6bf1
parent: 8aaecfe55f73a8c599fed1adbbba11a5e94dfc3c
author: Sigrid Solveig Haflínudóttir <sigrid@ftrv.se>
date: Tue May 9 14:53:53 EDT 2023

7c: peephole: ACASE needs two distinctive registers - nothing to optimize

--- a/sys/src/cmd/7c/peep.c
+++ b/sys/src/cmd/7c/peep.c
@@ -1122,7 +1122,6 @@
 	case AFABSS:
 	case AFSQRTD:
 	case AFSQRTS:
-	case ACASE:
 #ifdef YYY
 		if(p->scond&(C_WBIT|C_PBIT))
 		if(v->type == D_REG) {
@@ -1303,6 +1302,9 @@
 		if(v->type == D_REG)
 			if(v->reg == REGARG)
 				return 3;
+		return 0;
+
+	case ACASE:
 		return 0;
 	}
 }