shithub: riscv

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ref: a5d8cd30bb126b301cd79393540be63558dcfe89
parent: b46a0e97ea5ec8666924ec34a6fa1cd86f899fcc
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sat Sep 3 14:18:28 EDT 2016

5c: format assembly constant right shift encoding 0 as >>32

--- a/sys/src/cmd/5c/list.c
+++ b/sys/src/cmd/5c/list.c
@@ -138,8 +138,12 @@
 		op = "<<>>->@>" + (((v>>5) & 3) << 1);
 		if(v & (1<<4))
 			snprint(str, sizeof str, "R%d%c%cR%d", v&15, op[0], op[1], (v>>8)&15);
-		else
-			snprint(str, sizeof str, "R%d%c%c%d", v&15, op[0], op[1], (v>>7)&31);
+		else {
+			int sh = (v>>7)&31;
+			if(sh == 0 && (v & (3<<5)) != 0)
+				sh = 32;
+			snprint(str, sizeof str, "R%d%c%c%d", v&15, op[0], op[1], sh);
+		}
 		if(a->reg != NREG)
 			snprint(str+strlen(str), sizeof(str)-strlen(str), "(R%d)", a->reg);
 		break;