shithub: riscv

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ref: cd38d4135633fd2dd9ce544aa3c2c86cf5078f8d
parent: dcdb2bfb9ab915b9f18c36dc951ca421d97496a2
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sun Dec 6 16:44:26 EST 2020 

pc64: AMD64 mandates SSE support, remove the check in fpuinit()


--- a/sys/src/9/pc64/fpu.c
+++ b/sys/src/9/pc64/fpu.c
@@ -30,19 +30,7 @@
 extern void _ldmxcsr(u32int);
 extern void _stts(void);
 
-/*
- * not used, AMD64 mandated SSE
- */
 static void
-fpx87save(FPsave*)
-{
-}
-static void
-fpx87restore(FPsave*)
-{
-}
-
-static void
 fpssesave(FPsave *s)
 {
 	_fxsave(s);
@@ -261,34 +249,29 @@
 void
 fpuinit(void)
 {
-	uintptr cr4;
+	u64int cr4;
 	ulong regs[4];
 
-	if((m->cpuiddx & (Sse|Fxsr)) == (Sse|Fxsr)){ /* have sse fp? */
-		cr4 = getcr4() | CR4Osfxsr|CR4Oxmmex;
+	cr4 = getcr4() | CR4Osfxsr|CR4Oxmmex;
+	putcr4(cr4);
+	fpsave = fpssesave;
+	fprestore = fpsserestore;
+
+	if((m->cpuidcx & (Xsave|Avx)) == (Xsave|Avx) && getconf("*noavx") == nil){
+		cr4 |= CR4Oxsave;
 		putcr4(cr4);
-		fpsave = fpssesave;
-		fprestore = fpsserestore;
+		m->xcr0 = 7; /* x87, sse, avx */
+		putxcr0(m->xcr0);
+		fpsave = fpxsave;
+		fprestore = fpxrestore;
 
-		if((m->cpuidcx & (Xsave|Avx)) == (Xsave|Avx) && getconf("*noavx") == nil){
-			cr4 |= CR4Oxsave;
-			putcr4(cr4);
-			m->xcr0 = 7; /* x87, sse, avx */
-			putxcr0(m->xcr0);
-			fpsave = fpxsave;
-			fprestore = fpxrestore;
-
-			cpuid(0xd, 1, regs);
-			if(regs[0] & Xsaveopt)
-				fpsave = fpxsaveopt;
-			if(regs[0] & Xsaves){
-				fpsave = fpxsaves;
-				fprestore = fpxrestores;
-			}
+		cpuid(0xd, 1, regs);
+		if(regs[0] & Xsaveopt)
+			fpsave = fpxsaveopt;
+		if(regs[0] & Xsaves){
+			fpsave = fpxsaves;
+			fprestore = fpxrestores;
 		}
-	} else {
-		fpsave = fpx87save;
-		fprestore = fpx87restore;
 	}
 }