shithub: riscv

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ref: dea28126ae9cf24556ae7a1957368df4377e06aa
parent: 99f79e390d46e8c51ad7a628919e29e8b27335f0
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Fri Mar 29 02:35:41 EDT 2019

5c: dont substibute (destination) registers contained in MOVM reglist

this fixes the miscompilation of 6l with 5c resulting in bogus
vlong -> long conversion at the top of asmandsz():

asmandsz 0x0000aec4	MOVW.W	R14,#-0x2c(R13)
asmandsz+0x4 0x0000aec8	MOVW	rex+8(FP),R5
asmandsz+0x8 0x0000aecc	MOVW	$andptr-SB(SB),R7
asmandsz+0xc 0x0000aed0	MOVW	R0,R6
asmandsz+0x10 0x0000aed4	AND	$#0x44,R5,R8
asmandsz+0x14 0x0000aed8	MOVW	R8,rex+8(FP)
asmandsz+0x18 0x0000aedc	MOVW	R0,R4
asmandsz+0x1c 0x0000aee0	MOVM.IA	(R0),[R1,R3] <- R1 used here
asmandsz+0x20 0x0000aee4	MOVW	R8,v-4(SP) <- substituted by R8

--- a/sys/src/cmd/5c/peep.c
+++ b/sys/src/cmd/5c/peep.c
@@ -337,7 +337,7 @@
 			break;
 
 		case AMOVM:
-			t = 1<<v2->reg;
+			t = (1<<v1->reg) | (1<<v2->reg);
 			if((p->from.type == D_CONST && (p->from.offset&t)) ||
 			   (p->to.type == D_CONST && (p->to.offset&t)))
 				return 0;