shithub: riscv

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ref: e8cf7530517534ccd9f5b0469191aa7c41581120
parent: 4e7fbabfc9f33f6ea5e5a46d5d6d7532d5f68301
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Thu May 9 06:23:23 EDT 2019 

7l: implement MOVP instruction


--- a/sys/src/cmd/7l/asmout.c
+++ b/sys/src/cmd/7l/asmout.c
@@ -847,6 +847,34 @@
 		o1 = omovlit(AMOV, p, &p->from, REGTMP);
 		o2 = olsr12u(opldr12(p->as), 0, REGTMP, p->to.reg);
 		break;
+
+	case 66:	/* movpT (R)O!,R; movpT O(R)!, R -> ldrT */
+		o1 = opldrpp(p->as);
+		v = p->from.offset >> 2 + ((o1 & S64) != 0);
+		if(v < -128 || v > 127)
+			diag("offset out of range\n%P", p);
+		if(p->from.type == D_XPOST)
+			o1 |= 1<<23;
+		else if(p->from.type == D_XPRE)
+			o1 |= 3<<23;
+		else
+			o1 |= 2<<23;
+		o1 |= ((v&0x7F)<<15) | (p->from.reg<<5) | p->reg | (p->to.reg<<10);
+		break;
+
+	case 67:	/* movpT R,(R)O!; movpT O(R)!, R -> strT */
+		o1 = LD2STR(opldrpp(p->as));
+		v = p->to.offset >> 2 + ((o1 & S64) != 0);
+		if(v < -128 || v > 127)
+			diag("offset out of range\n%P", p);
+		if(p->to.type == D_XPOST)
+			o1 |= 1<<23;
+		else if(p->to.type == D_XPRE)
+			o1 |= 3<<23;
+		else
+			o1 |= 2<<23;
+		o1 |= ((v&0x7F)<<15) | (p->to.reg<<5) | p->from.reg | (p->reg<<10);
+		break;
 	}
 
 	if(debug['a'] > 1)
@@ -1552,6 +1580,9 @@
 	case AMOVHU:	return 1<<30 | 7<<27 | 0<<26 | 0<<24 | 1<<22;
 	case AMOVB:	return 0<<30 | 7<<27 | 0<<26 | 0<<24 | 2<<22;
 	case AMOVBU:	return 0<<30 | 7<<27 | 0<<26 | 0<<24 | 1<<22;
+	case AMOVPW:	return 0<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22;
+	case AMOVPSW:	return 1<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22;
+	case AMOVP:	return 2<<30 | 5<<27 | 0<<26 | 0<<23 | 1<<22;
 	}
 	diag("bad opldr %A\n%P", a, curp);
 	return 0;
--- a/sys/src/cmd/7l/optab.c
+++ b/sys/src/cmd/7l/optab.c
@@ -309,6 +309,20 @@
 	{ AFMOVS, 	C_FREG,	C_NONE,	C_XPRE,		23, 4, 0 },
 	{ AFMOVD, 	C_FREG,	C_NONE,	C_XPRE,		23, 4, 0 },
 
+	{ AMOVP, 	C_PPAUTO,	C_REG,	C_REG,		66, 4, 0 },
+	{ AMOVP, 	C_PPOREG,	C_REG,	C_REG,		66, 4, 0 },
+	{ AMOVP, 	C_NPAUTO,	C_REG,	C_REG,		66, 4, 0 },
+	{ AMOVP, 	C_NPOREG,	C_REG,	C_REG,		66, 4, 0 },
+	{ AMOVP, 	C_XPOST,	C_REG,	C_REG,		66, 4, 0 },
+	{ AMOVP, 	C_XPRE,		C_REG,	C_REG,		66, 4, 0 },
+
+	{ AMOVP, 	C_REG,		C_REG, C_PPAUTO,	67, 4, 0 },
+	{ AMOVP, 	C_REG,		C_REG, C_PPOREG,	67, 4, 0 },
+	{ AMOVP, 	C_REG,		C_REG, C_NPAUTO,	67, 4, 0 },
+	{ AMOVP, 	C_REG,		C_REG, C_NPOREG,	67, 4, 0 },
+	{ AMOVP, 	C_REG,		C_REG, C_XPOST,		67, 4, 0 },
+	{ AMOVP, 	C_REG,		C_REG, C_XPRE,		67, 4, 0 },
+
 	/* special */
 	{ AMOV,		C_SPR,	C_NONE,	C_REG,		35, 4, 0 },
 	{ AMRS,		C_SPR,	C_NONE,	C_REG,		35, 4, 0 },
--- a/sys/src/cmd/7l/span.c
+++ b/sys/src/cmd/7l/span.c
@@ -1347,6 +1347,11 @@
 			oprange[ASHA256H2] = t;
 			oprange[ASHA256SU1] = t;
 			break;
+
+		case AMOVP:
+			oprange[AMOVPW] = t;
+			oprange[AMOVPSW] = t;
+			break;
 		}
 	}
 }