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bcm: move fiq saved pc adjust into lexception.s so it can be shared with arm64

--- a/sys/src/9/bcm/irq.c

+++ b/sys/src/9/bcm/irq.c

@@ -83,6 +83,7 @@

 	Vctl *v;

 	int clockintr;

+	m->intr++;

 	clockintr = 0;

 	for(v = vctl[m->machno]; v != nil; v = v->next)

 		if((*v->reg & v->mask) != 0){

@@ -103,11 +104,10 @@

 {

 	Vctl *v;

+	m->intr++;

 	v = vfiq;

 	if(v == nil)

 		panic("cpu%d: unexpected item in bagging area", m->machno);

-	m->intr++;

-	ureg->pc -= 4;

 	coherence();

 	v->f(ureg, v->a);

 	coherence();

--- a/sys/src/9/bcm/lexception.s

+++ b/sys/src/9/bcm/lexception.s

@@ -187,6 +187,7 @@

 	MOVW	$PsrMfiq, R8		/* trap type */

 	MOVW	SPSR, R9		/* interrupted psr */

 	MOVW	R14, R10		/* interrupted pc */

+	SUB	$4, R10			/* ureg->pc -= 4 */

 	MOVM.DB.W [R8-R10], (R13)	/* save in ureg */

 	MOVM.DB.S [R0-R14], (R13)	/* save interrupted regs */

 	SUB	$(15*4), R13

--- a/sys/src/9/bcm/trap.c

+++ b/sys/src/9/bcm/trap.c

@@ -188,7 +188,6 @@

 		break;

 	case PsrMirq:

 		clockintr = irq(ureg);

-		m->intr++;

 		break;

 	case PsrMabt:			/* prefetch fault */

 		x = ifsrget();