shithub: riscv

Download patch

ref: f5f9ecdcfa0b27f5971509137d77a5155b4b507d
parent: 972cd5e3fc96059548b725ed01704ae88c55e1b4
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Tue Mar 17 12:12:01 EDT 2015 

6c: MOVL xxx, r; MOVLQZX r, r -> MOVL xxx, r

eleminate MOVLQXZ instructions after MOVL as MOVL implicitely
zero extends the result.


--- a/sys/src/cmd/6c/peep.c
+++ b/sys/src/cmd/6c/peep.c
@@ -100,14 +100,27 @@
 		case AMOVQ:
 		case AMOVSS:
 		case AMOVSD:
-			if(regtyp(&p->to))
+			if(!regtyp(&p->to))
+				break;
 			if(regtyp(&p->from)) {
 				if(copyprop(r)) {
 					excise(r);
 					t++;
-				} else
+					break;
+				}
 				if(subprop(r) && copyprop(r)) {
 					excise(r);
+					t++;
+					break;
+				}
+			}
+			if(p->as != AMOVL)
+				break;
+			r1 = rnops(uniqs(r));
+			if(r1 != R){
+				p1 = r1->prog;
+				if(p1->as == AMOVLQZX && p1->from.type == p->to.type && p1->to.type == p->to.type){
+					excise(r1);
 					t++;
 				}
 			}