ref: 07cf024d4d061feac503054d15d039c2cfbce35e
parent: 5ca8c5f31d2d1c5d9760577a651e0d710cef7663
author: James Zern <jzern@google.com>
date: Tue Apr 27 14:02:35 EDT 2021
vpx_convolve_avg_neon: prefer != 0 to > 0 in tests this produces better assembly code Change-Id: I174b67a595d7efeb60c921f066302043b1c7d84e
--- a/vpx_dsp/arm/vpx_convolve_avg_neon.c
+++ b/vpx_dsp/arm/vpx_convolve_avg_neon.c
@@ -43,7 +43,7 @@
vst1_lane_u32((uint32_t *)dst, vreinterpret_u32_u8(dd0), 1);
dst += dst_stride;
h -= 2;
- } while (h > 0);
+ } while (h != 0);
} else if (w == 8) { // avg8
uint8x8_t s0, s1, d0, d1;
uint8x16_t s01, d01;
@@ -64,7 +64,7 @@
vst1_u8(dst, vget_high_u8(d01));
dst += dst_stride;
h -= 2;
- } while (h > 0);
+ } while (h != 0);
} else if (w < 32) { // avg16
uint8x16_t s0, s1, d0, d1;
do {
@@ -83,7 +83,7 @@
vst1q_u8(dst, d1);
dst += dst_stride;
h -= 2;
- } while (h > 0);
+ } while (h != 0);
} else if (w == 32) { // avg32
uint8x16_t s0, s1, s2, s3, d0, d1, d2, d3;
do {
@@ -110,7 +110,7 @@
vst1q_u8(dst + 16, d3);
dst += dst_stride;
h -= 2;
- } while (h > 0);
+ } while (h != 0);
} else { // avg64
uint8x16_t s0, s1, s2, s3, d0, d1, d2, d3;
do {