shithub: lwext4

Download patch

ref: 0a123dfadb99f0f34c392e8643fde8f69f69d11a
parent: b43526da4f49142491954695917b090e0802b672
author: gkostka <kostka.grzegorz@gmail.com>
date: Mon Sep 21 19:10:36 EDT 2015

stm32f429 demo code format

--- a/demos/stm32f429_disco/config.h
+++ b/demos/stm32f429_disco/config.h
@@ -1,42 +1,38 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef CONFIG_H_
-#define CONFIG_H_
-
-
-/**@brief   Main clock frequency.*/
-#define CFG_CCLK_FREQ       168000000ul
-
-/**@brief   EXT partition block size (only when static cache on)*/
-#define EXT_LOGICAL_BLOCK_SIZE (1024 * 4)
-
-
-#endif /* CONFIG_H_ */
-
-
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef CONFIG_H_
+#define CONFIG_H_
+
+/**@brief   Main clock frequency.*/
+#define CFG_CCLK_FREQ 168000000ul
+
+/**@brief   EXT partition block size (only when static cache on)*/
+#define EXT_LOGICAL_BLOCK_SIZE (1024 * 4)
+
+#endif /* CONFIG_H_ */
--- a/demos/stm32f429_disco/hw_init.c
+++ b/demos/stm32f429_disco/hw_init.c
@@ -1,191 +1,171 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <config.h>
-#include <stm32f4xx.h>
-#include <stm32f429i_discovery_lcd.h>
-#include <lcd_log.h>
-#include <stdint.h>
-
-#include <usbh_core.h>
-#include <usbh_msc.h>
-
-
-
-#include <hw_init.h>
-#include <stdbool.h>
-
-USBH_HandleTypeDef hUSB_Host;
-
-
-static bool msc_connected = false;
-static bool enum_done = false;
-
-static void USBH_UserProcess(USBH_HandleTypeDef *phost, uint8_t id)
-{
-  switch(id)
-  {
-  case HOST_USER_SELECT_CONFIGURATION:
-      break;
-
-  case HOST_USER_DISCONNECTION:
-      msc_connected = false;
-      enum_done = false;
-      break;
-
-  case HOST_USER_CLASS_ACTIVE:
-	  enum_done = true;
-      break;
-
-  case HOST_USER_CONNECTION:
-	  msc_connected = true;
-      break;
-  default:
-      break;
-  }
-}
-
-#define LCD_FRAME_BUFFER_LAYER0                  (LCD_FRAME_BUFFER+0x130000)
-#define LCD_FRAME_BUFFER_LAYER1                  LCD_FRAME_BUFFER
-#define CONVERTED_FRAME_BUFFER                   (LCD_FRAME_BUFFER+0x260000)
-
-static void SystemClock_Config(void)
-{
-  RCC_ClkInitTypeDef RCC_ClkInitStruct;
-  RCC_OscInitTypeDef RCC_OscInitStruct;
-
-  /* Enable Power Control clock */
-  __PWR_CLK_ENABLE();
-
-  /* The voltage scaling allows optimizing the power consumption when the device is
-     clocked below the maximum system frequency, to update the voltage scaling value
-     regarding system frequency refer to product datasheet.  */
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
-  /* Enable HSE Oscillator and activate PLL with HSE as source */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 8;
-  RCC_OscInitStruct.PLL.PLLN = 336;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = 7;
-  HAL_RCC_OscConfig (&RCC_OscInitStruct);
-
-  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-     clocks dividers */
-  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
-}
-
-
-void hw_init(void)
-{
-	SystemInit();
-    HAL_Init();
-    SystemClock_Config();
-
-    /* Initialize the LEDs */
-    BSP_LED_Init(LED3);
-    BSP_LED_Init(LED4);
-
-    SysTick_Config(CFG_CCLK_FREQ / 1000);
-
-    USBH_Init(&hUSB_Host, USBH_UserProcess, 0);
-    USBH_RegisterClass(&hUSB_Host, USBH_MSC_CLASS);
-    USBH_Start(&hUSB_Host);
-
-    BSP_LCD_Init();
-
-    /* Layer2 Init */
-    BSP_LCD_LayerDefaultInit(1, LCD_FRAME_BUFFER_LAYER1);
-    BSP_LCD_SelectLayer(1);
-    BSP_LCD_Clear(LCD_COLOR_WHITE);
-    BSP_LCD_SetColorKeying(1, LCD_COLOR_WHITE);
-    BSP_LCD_SetLayerVisible(1, DISABLE);
-
-    /* Layer1 Init */
-    BSP_LCD_LayerDefaultInit(0, LCD_FRAME_BUFFER_LAYER0);
-    BSP_LCD_SelectLayer(0);
-    BSP_LCD_DisplayOn();
-    BSP_LCD_Clear(LCD_COLOR_BLACK);
-
-
-    LCD_LOG_Init();
-    LCD_LOG_SetHeader((uint8_t *)"STM32 LWEXT4 DEMO  ");
-}
-
-void hw_usb_process(void)
-{
-    USBH_Process(&hUSB_Host);
-}
-
-bool hw_usb_connected(void)
-{
-    return msc_connected;
-}
-
-bool hw_usb_enum_done(void)
-{
-    return enum_done;
-}
-
-void hw_led_red(bool on)
-{
-    on ? BSP_LED_On(LED4) : BSP_LED_Off(LED4);
-}
-
-void hw_led_green(bool on)
-{
-    on ? BSP_LED_On(LED3) : BSP_LED_Off(LED3);
-}
-
-uint32_t tim_get_ms(void)
-{
-    return HAL_GetTick();
-}
-
-uint64_t tim_get_us(void)
-{
-    return (uint64_t)HAL_GetTick() * 1000 +
-            ((SysTick->LOAD - SysTick->VAL) * 1000) / SysTick->LOAD;
-}
-
-void tim_wait_ms(uint32_t ms)
-{
-    volatile uint32_t t = HAL_GetTick();
-
-    while((t + ms) > HAL_GetTick())
-        ;
-}
-
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <config.h>
+#include <stm32f4xx.h>
+#include <stm32f429i_discovery_lcd.h>
+#include <lcd_log.h>
+#include <stdint.h>
+
+#include <usbh_core.h>
+#include <usbh_msc.h>
+
+#include <hw_init.h>
+#include <stdbool.h>
+
+USBH_HandleTypeDef hUSB_Host;
+
+static bool msc_connected = false;
+static bool enum_done = false;
+
+static void USBH_UserProcess(USBH_HandleTypeDef *phost, uint8_t id)
+{
+	switch (id) {
+	case HOST_USER_SELECT_CONFIGURATION:
+		break;
+
+	case HOST_USER_DISCONNECTION:
+		msc_connected = false;
+		enum_done = false;
+		break;
+
+	case HOST_USER_CLASS_ACTIVE:
+		enum_done = true;
+		break;
+
+	case HOST_USER_CONNECTION:
+		msc_connected = true;
+		break;
+	default:
+		break;
+	}
+}
+
+#define LCD_FRAME_BUFFER_LAYER0 (LCD_FRAME_BUFFER + 0x130000)
+#define LCD_FRAME_BUFFER_LAYER1 LCD_FRAME_BUFFER
+#define CONVERTED_FRAME_BUFFER (LCD_FRAME_BUFFER + 0x260000)
+
+static void SystemClock_Config(void)
+{
+	RCC_ClkInitTypeDef RCC_ClkInitStruct;
+	RCC_OscInitTypeDef RCC_OscInitStruct;
+
+	/* Enable Power Control clock */
+	__PWR_CLK_ENABLE();
+
+	/* The voltage scaling allows optimizing the power consumption when the
+	   device is
+	   clocked below the maximum system frequency, to update the voltage
+	   scaling value
+	   regarding system frequency refer to product datasheet.  */
+	__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+	/* Enable HSE Oscillator and activate PLL with HSE as source */
+	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+	RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+	RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+	RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+	RCC_OscInitStruct.PLL.PLLM = 8;
+	RCC_OscInitStruct.PLL.PLLN = 336;
+	RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+	RCC_OscInitStruct.PLL.PLLQ = 7;
+	HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+	/* Select PLL as system clock source and configure the HCLK, PCLK1 and
+	   PCLK2
+	   clocks dividers */
+	RCC_ClkInitStruct.ClockType =
+	    (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 |
+	     RCC_CLOCKTYPE_PCLK2);
+	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+	RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+	RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+	RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+	HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+}
+
+void hw_init(void)
+{
+	SystemInit();
+	HAL_Init();
+	SystemClock_Config();
+
+	/* Initialize the LEDs */
+	BSP_LED_Init(LED3);
+	BSP_LED_Init(LED4);
+
+	SysTick_Config(CFG_CCLK_FREQ / 1000);
+
+	USBH_Init(&hUSB_Host, USBH_UserProcess, 0);
+	USBH_RegisterClass(&hUSB_Host, USBH_MSC_CLASS);
+	USBH_Start(&hUSB_Host);
+
+	BSP_LCD_Init();
+
+	/* Layer2 Init */
+	BSP_LCD_LayerDefaultInit(1, LCD_FRAME_BUFFER_LAYER1);
+	BSP_LCD_SelectLayer(1);
+	BSP_LCD_Clear(LCD_COLOR_WHITE);
+	BSP_LCD_SetColorKeying(1, LCD_COLOR_WHITE);
+	BSP_LCD_SetLayerVisible(1, DISABLE);
+
+	/* Layer1 Init */
+	BSP_LCD_LayerDefaultInit(0, LCD_FRAME_BUFFER_LAYER0);
+	BSP_LCD_SelectLayer(0);
+	BSP_LCD_DisplayOn();
+	BSP_LCD_Clear(LCD_COLOR_BLACK);
+
+	LCD_LOG_Init();
+	LCD_LOG_SetHeader((uint8_t *)"STM32 LWEXT4 DEMO  ");
+}
+
+void hw_usb_process(void) { USBH_Process(&hUSB_Host); }
+
+bool hw_usb_connected(void) { return msc_connected; }
+
+bool hw_usb_enum_done(void) { return enum_done; }
+
+void hw_led_red(bool on) { on ? BSP_LED_On(LED4) : BSP_LED_Off(LED4); }
+
+void hw_led_green(bool on) { on ? BSP_LED_On(LED3) : BSP_LED_Off(LED3); }
+
+uint32_t tim_get_ms(void) { return HAL_GetTick(); }
+
+uint64_t tim_get_us(void)
+{
+	return (uint64_t)HAL_GetTick() * 1000 +
+	       ((SysTick->LOAD - SysTick->VAL) * 1000) / SysTick->LOAD;
+}
+
+void tim_wait_ms(uint32_t ms)
+{
+	volatile uint32_t t = HAL_GetTick();
+
+	while ((t + ms) > HAL_GetTick())
+		;
+}
--- a/demos/stm32f429_disco/hw_init.h
+++ b/demos/stm32f429_disco/hw_init.h
@@ -1,49 +1,48 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-
-#ifndef HW_INIT_H_
-#define HW_INIT_H_
-
-#include <config.h>
-#include <stdbool.h>
-#include <stdint.h>
-
-void hw_init(void);
-void hw_usb_process(void);
-bool hw_usb_connected(void);
-bool hw_usb_enum_done(void);
-
-void hw_led_red(bool on);
-void hw_led_green(bool on);
-
-uint32_t tim_get_ms(void);
-uint64_t tim_get_us(void);
-void tim_wait_ms(uint32_t ms);
-
-#endif /* HW_INIT_H_ */
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef HW_INIT_H_
+#define HW_INIT_H_
+
+#include <config.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+void hw_init(void);
+void hw_usb_process(void);
+bool hw_usb_connected(void);
+bool hw_usb_enum_done(void);
+
+void hw_led_red(bool on);
+void hw_led_green(bool on);
+
+uint32_t tim_get_ms(void);
+uint64_t tim_get_us(void);
+void tim_wait_ms(uint32_t ms);
+
+#endif /* HW_INIT_H_ */
--- a/demos/stm32f429_disco/main.c
+++ b/demos/stm32f429_disco/main.c
@@ -1,172 +1,169 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <config.h>
-#include <hw_init.h>
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <unistd.h>
-#include <getopt.h>
-#include <stdbool.h>
-#include <time.h>
-#include <unistd.h>
-#include <time.h>
-
-#include <usb_msc_lwext4.h>
-#include <ext4.h>
-#include "../../blockdev/test_lwext4.h"
-
-
-/**@brief   Read-write size*/
-#define READ_WRITE_SZIZE 1024 * 16
-
-/**@brief   Delay test (slower LCD scroll)*/
-#define TEST_DELAY_MS    1000
-
-/**@brief   Input stream name.*/
-char input_name[128] = "ext2";
-
-/**@brief   Read-write size*/
-static int rw_szie  = READ_WRITE_SZIZE;
-
-/**@brief   Read-write size*/
-static int rw_count = 100;
-
-/**@brief   Directory test count*/
-static int dir_cnt  = 100;
-
-/**@brief   Static or dynamic cache mode*/
-static bool cache_mode = false;
-
-/**@brief   Cleanup after test.*/
-static bool cleanup_flag = false;
-
-/**@brief   Block device stats.*/
-static bool bstat = false;
-
-/**@brief   Superblock stats.*/
-static bool sbstat = false;
-
-/**@brief   Block device handle.*/
-static struct ext4_blockdev *bd;
-
-/**@brief   Block cache handle.*/
-static struct ext4_bcache   *bc;
-
-static bool open_filedev(void)
-{
-
-	bd = ext4_usb_msc_get();
-	bc = ext4_usb_msc_cache_get();
-	if(!bd || !bc){
-		printf("open_filedev: fail\n");
-		return false;
-	}
-	return true;
-}
-
-int main(void)
-{
-	hw_init();
-
-	setbuf(stdout, 0);
-	printf("connect usb drive...\n");
-
-	while(!hw_usb_connected())
-		hw_usb_process();
-	printf("usb drive connected\n");
-
-	while(!hw_usb_enum_done())
-		hw_usb_process();
-	printf("usb drive enum done\n");
-
-	hw_led_red(1);
-
-	printf("test conditions:\n");
-	printf("  rw size: %d\n",  rw_szie);
-	printf("  rw count: %d\n", rw_count);
-	printf("  cache mode: %s\n", cache_mode ? "dynamic" : "static");
-
-	if (!open_filedev())
-		goto Finish;
-
-	tim_wait_ms(TEST_DELAY_MS);
-	if(!test_lwext4_mount(bd, bc))
-		return EXIT_FAILURE;
-
-	tim_wait_ms(TEST_DELAY_MS);
-
-	ext4_cache_write_back("/mp/", 1);
-	test_lwext4_cleanup();
-
-	if(sbstat){
-		tim_wait_ms(TEST_DELAY_MS);
-		test_lwext4_mp_stats();
-	}
-
-	tim_wait_ms(TEST_DELAY_MS);
-	test_lwext4_dir_ls("/mp/");
-	if(!test_lwext4_dir_test(dir_cnt))
-		return EXIT_FAILURE;
-
-	tim_wait_ms(TEST_DELAY_MS);
-	if(!test_lwext4_file_test(rw_szie, rw_count))
-		return EXIT_FAILURE;
-
-	if(sbstat){
-		tim_wait_ms(TEST_DELAY_MS);
-		test_lwext4_mp_stats();
-	}
-
-	if(cleanup_flag){
-		tim_wait_ms(TEST_DELAY_MS);
-		test_lwext4_cleanup();
-	}
-
-	if(bstat){
-		tim_wait_ms(TEST_DELAY_MS);
-		test_lwext4_block_stats();
-	}
-
-	ext4_cache_write_back("/mp/", 0);
-	if(!test_lwext4_umount())
-		return EXIT_FAILURE;
-
-	printf("press RESET button to restart\n");
-	Finish:
-	while (1) {
-		tim_wait_ms(500);
-		hw_led_green(1);
-		tim_wait_ms(500);
-		hw_led_green(0);
-
-	}
-}
-
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <config.h>
+#include <hw_init.h>
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <getopt.h>
+#include <stdbool.h>
+#include <time.h>
+#include <unistd.h>
+#include <time.h>
+
+#include <usb_msc_lwext4.h>
+#include <ext4.h>
+#include "../../blockdev/test_lwext4.h"
+
+/**@brief   Read-write size*/
+#define READ_WRITE_SZIZE 1024 * 16
+
+/**@brief   Delay test (slower LCD scroll)*/
+#define TEST_DELAY_MS 1000
+
+/**@brief   Input stream name.*/
+char input_name[128] = "ext2";
+
+/**@brief   Read-write size*/
+static int rw_szie = READ_WRITE_SZIZE;
+
+/**@brief   Read-write size*/
+static int rw_count = 100;
+
+/**@brief   Directory test count*/
+static int dir_cnt = 100;
+
+/**@brief   Static or dynamic cache mode*/
+static bool cache_mode = false;
+
+/**@brief   Cleanup after test.*/
+static bool cleanup_flag = false;
+
+/**@brief   Block device stats.*/
+static bool bstat = false;
+
+/**@brief   Superblock stats.*/
+static bool sbstat = false;
+
+/**@brief   Block device handle.*/
+static struct ext4_blockdev *bd;
+
+/**@brief   Block cache handle.*/
+static struct ext4_bcache *bc;
+
+static bool open_filedev(void)
+{
+
+	bd = ext4_usb_msc_get();
+	bc = ext4_usb_msc_cache_get();
+	if (!bd || !bc) {
+		printf("open_filedev: fail\n");
+		return false;
+	}
+	return true;
+}
+
+int main(void)
+{
+	hw_init();
+
+	setbuf(stdout, 0);
+	printf("connect usb drive...\n");
+
+	while (!hw_usb_connected())
+		hw_usb_process();
+	printf("usb drive connected\n");
+
+	while (!hw_usb_enum_done())
+		hw_usb_process();
+	printf("usb drive enum done\n");
+
+	hw_led_red(1);
+
+	printf("test conditions:\n");
+	printf("  rw size: %d\n", rw_szie);
+	printf("  rw count: %d\n", rw_count);
+	printf("  cache mode: %s\n", cache_mode ? "dynamic" : "static");
+
+	if (!open_filedev())
+		goto Finish;
+
+	tim_wait_ms(TEST_DELAY_MS);
+	if (!test_lwext4_mount(bd, bc))
+		return EXIT_FAILURE;
+
+	tim_wait_ms(TEST_DELAY_MS);
+
+	ext4_cache_write_back("/mp/", 1);
+	test_lwext4_cleanup();
+
+	if (sbstat) {
+		tim_wait_ms(TEST_DELAY_MS);
+		test_lwext4_mp_stats();
+	}
+
+	tim_wait_ms(TEST_DELAY_MS);
+	test_lwext4_dir_ls("/mp/");
+	if (!test_lwext4_dir_test(dir_cnt))
+		return EXIT_FAILURE;
+
+	tim_wait_ms(TEST_DELAY_MS);
+	if (!test_lwext4_file_test(rw_szie, rw_count))
+		return EXIT_FAILURE;
+
+	if (sbstat) {
+		tim_wait_ms(TEST_DELAY_MS);
+		test_lwext4_mp_stats();
+	}
+
+	if (cleanup_flag) {
+		tim_wait_ms(TEST_DELAY_MS);
+		test_lwext4_cleanup();
+	}
+
+	if (bstat) {
+		tim_wait_ms(TEST_DELAY_MS);
+		test_lwext4_block_stats();
+	}
+
+	ext4_cache_write_back("/mp/", 0);
+	if (!test_lwext4_umount())
+		return EXIT_FAILURE;
+
+	printf("press RESET button to restart\n");
+Finish:
+	while (1) {
+		tim_wait_ms(500);
+		hw_led_green(1);
+		tim_wait_ms(500);
+		hw_led_green(0);
+	}
+}
--- a/demos/stm32f429_disco/syscalls.c
+++ b/demos/stm32f429_disco/syscalls.c
@@ -1,156 +1,139 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <sys/stat.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <stdio.h>
-#include <signal.h>
-#include <time.h>
-
-#include <lcd_log.h>
-
-int _getpid(void)
-{
-    return 1;
-}
-
-int _kill(int pid, int sig)
-{
-    errno = EINVAL;
-    return -1;
-}
-
-void _exit (int status)
-{
-    _kill(status, -1);
-    while (1) {}                /* Make sure we hang here */
-}
-
-int _write(int file, char *ptr, int len)
-{
-    int todo;
-
-    for (todo = 0; todo < len; todo++)
-    {
-        __io_putchar( *ptr++ );
-    }
-
-    /* Implement your write code here, this is used by puts and printf for example */
-    return len;
-}
-
-caddr_t _sbrk(int incr)
-{
-	extern char __heap_start;
-	extern char __heap_end;
-	static char *current_heap_end = &__heap_start;
-	char *previous_heap_end;
-
-	previous_heap_end = current_heap_end;
-
-	if (current_heap_end + incr > &__heap_end)
-	{
-		errno = ENOMEM;
-		return (caddr_t) -1;
-	}
-
-	current_heap_end += incr;
-
-	return (caddr_t)previous_heap_end;
-}
-
-int _close(int file)
-{
-    return -1;
-}
-
-
-int _fstat(int file, struct stat *st)
-{
-    st->st_mode = S_IFCHR;
-    return 0;
-}
-
-int _isatty(int file)
-{
-    return 1;
-}
-
-int _lseek(int file, int ptr, int dir)
-{
-    return 0;
-}
-
-int _read(int file, char *ptr, int len)
-{
-    return 0;
-}
-
-int _open(char *path, int flags, ...)
-{
-    /* Pretend like we always fail */
-    return -1;
-}
-
-int _wait(int *status)
-{
-    errno = ECHILD;
-    return -1;
-}
-
-int _unlink(char *name)
-{
-    errno = ENOENT;
-    return -1;
-}
-
-
-int _stat(char *file, struct stat *st)
-{
-    st->st_mode = S_IFCHR;
-    return 0;
-}
-
-int _link(char *old, char *new)
-{
-    errno = EMLINK;
-    return -1;
-}
-
-int _fork(void)
-{
-    errno = EAGAIN;
-    return -1;
-}
-
-int _execve(char *name, char **argv, char **env)
-{
-    errno = ENOMEM;
-    return -1;
-}
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/stat.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <stdio.h>
+#include <signal.h>
+#include <time.h>
+
+#include <lcd_log.h>
+
+int _getpid(void) { return 1; }
+
+int _kill(int pid, int sig)
+{
+	errno = EINVAL;
+	return -1;
+}
+
+void _exit(int status)
+{
+	_kill(status, -1);
+	while (1) {
+	} /* Make sure we hang here */
+}
+
+int _write(int file, char *ptr, int len)
+{
+	int todo;
+
+	for (todo = 0; todo < len; todo++) {
+		__io_putchar(*ptr++);
+	}
+
+	/* Implement your write code here, this is used by puts and printf for
+	 * example */
+	return len;
+}
+
+caddr_t _sbrk(int incr)
+{
+	extern char __heap_start;
+	extern char __heap_end;
+	static char *current_heap_end = &__heap_start;
+	char *previous_heap_end;
+
+	previous_heap_end = current_heap_end;
+
+	if (current_heap_end + incr > &__heap_end) {
+		errno = ENOMEM;
+		return (caddr_t)-1;
+	}
+
+	current_heap_end += incr;
+
+	return (caddr_t)previous_heap_end;
+}
+
+int _close(int file) { return -1; }
+
+int _fstat(int file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _isatty(int file) { return 1; }
+
+int _lseek(int file, int ptr, int dir) { return 0; }
+
+int _read(int file, char *ptr, int len) { return 0; }
+
+int _open(char *path, int flags, ...)
+{
+	/* Pretend like we always fail */
+	return -1;
+}
+
+int _wait(int *status)
+{
+	errno = ECHILD;
+	return -1;
+}
+
+int _unlink(char *name)
+{
+	errno = ENOENT;
+	return -1;
+}
+
+int _stat(char *file, struct stat *st)
+{
+	st->st_mode = S_IFCHR;
+	return 0;
+}
+
+int _link(char *old, char *new)
+{
+	errno = EMLINK;
+	return -1;
+}
+
+int _fork(void)
+{
+	errno = EAGAIN;
+	return -1;
+}
+
+int _execve(char *name, char **argv, char **env)
+{
+	errno = ENOMEM;
+	return -1;
+}
--- a/demos/stm32f429_disco/system_stm32f4xx.c
+++ b/demos/stm32f429_disco/system_stm32f4xx.c
@@ -1,270 +1,302 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32f4xx.c
-  * @author  MCD Application Team
-  * @version V1.0.1
-  * @date    26-February-2014
-  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
-  *
-  *   This file provides two functions and one global variable to be called from 
-  *   user application:
-  *      - SystemInit(): This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32f4xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  *
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f4xx_system
-  * @{
-  */  
-  
-/** @addtogroup STM32F4xx_System_Private_Includes
-  * @{
-  */
-
-#include "stm32f4xx_hal.h"
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Defines
-  * @{
-  */
-
-/************************* Miscellaneous Configuration ************************/
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
-                                   This value must be a multiple of 0x200. */
-/******************************************************************************/
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Variables
-  * @{
-  */
-  /* This variable is updated in three ways:
-      1) by calling CMSIS function SystemCoreClockUpdate()
-      2) by calling HAL API function HAL_RCC_GetHCLKFreq()
-      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
-         Note: If you use this function to configure the system clock; then there
-               is no need to call the 2 first functions listed above, since SystemCoreClock
-               variable is updated automatically.
-  */
-  uint32_t SystemCoreClock = 16000000;
-  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F4xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system
-  *         Initialize the FPU setting, vector table location and External memory 
-  *         configuration.
-  * @param  None
-  * @retval None
-  */
-void SystemInit(void)
-{
-  /* FPU settings ------------------------------------------------------------*/
-  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
-  #endif
-  /* Reset the RCC clock configuration to the default reset state ------------*/
-  /* Set HSION bit */
-  RCC->CR |= (uint32_t)0x00000001;
-
-  /* Reset CFGR register */
-  RCC->CFGR = 0x00000000;
-
-  /* Reset HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFFF;
-
-  /* Reset PLLCFGR register */
-  RCC->PLLCFGR = 0x24003010;
-
-  /* Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFF;
-
-  /* Disable all interrupts */
-  RCC->CIR = 0x00000000;
-
-  /* Configure the Vector Table location add offset address ------------------*/
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
-#endif
-}
-
-/**
-   * @brief  Update SystemCoreClock variable according to Clock Register Values.
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
-  *             16 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
-  *              depends on the application requirements), user has to ensure that HSE_VALUE
-  *              is same as the real frequency of the crystal used. Otherwise, this function
-  *              may have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  *     
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate(void)
-{
-  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
-  
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-
-  switch (tmp)
-  {
-    case 0x00:  /* HSI used as system clock source */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x04:  /* HSE used as system clock source */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x08:  /* PLL used as system clock source */
-
-      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
-         SYSCLK = PLL_VCO / PLL_P
-         */    
-      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
-      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
-      
-      if (pllsource != 0)
-      {
-        /* HSE used as PLL clock source */
-        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-      }
-      else
-      {
-        /* HSI used as PLL clock source */
-        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
-      }
-
-      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
-      SystemCoreClock = pllvco/pllp;
-      break;
-    default:
-      SystemCoreClock = HSI_VALUE;
-      break;
-  }
-  /* Compute HCLK frequency --------------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK frequency */
-  SystemCoreClock >>= tmp;
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */    
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+/**
+  ******************************************************************************
+  * @file    system_stm32f4xx.c
+  * @author  MCD Application Team
+  * @version V1.0.1
+  * @date    26-February-2014
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be
+  *used
+  *                                  by the user application to setup the
+  *SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and
+  *must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
+  *
+  * Redistribution and use in source and binary forms, with or without
+  *modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright
+  *notice,
+  *      this list of conditions and the following disclaimer in the
+  *documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its
+  *contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+  *ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+  *LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+  *USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f4xx_hal.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET                                                        \
+	0x00 /*!< Vector Table base offset field.                              \
+		  This value must be a multiple of 0x200. */
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+  * @{
+  */
+/* This variable is updated in three ways:
+    1) by calling CMSIS function SystemCoreClockUpdate()
+    2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+    3) each time HAL_RCC_ClockConfig() is called to configure the system clock
+   frequency
+       Note: If you use this function to configure the system clock; then there
+	     is no need to call the 2 first functions listed above, since
+   SystemCoreClock
+	     variable is updated automatically.
+*/
+uint32_t SystemCoreClock = 16000000;
+__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0,
+				 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the FPU setting, vector table location and External
+ * memory
+  *         configuration.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+/* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+	SCB->CPACR |= ((3UL << 10 * 2) |
+		       (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
+#endif
+	/* Reset the RCC clock configuration to the default reset state
+	 * ------------*/
+	/* Set HSION bit */
+	RCC->CR |= (uint32_t)0x00000001;
+
+	/* Reset CFGR register */
+	RCC->CFGR = 0x00000000;
+
+	/* Reset HSEON, CSSON and PLLON bits */
+	RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+	/* Reset PLLCFGR register */
+	RCC->PLLCFGR = 0x24003010;
+
+	/* Reset HSEBYP bit */
+	RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+	/* Disable all interrupts */
+	RCC->CIR = 0x00000000;
+
+/* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+	SCB->VTOR =
+	    SRAM_BASE |
+	    VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+	SCB->VTOR =
+	    FLASH_BASE |
+	    VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or
+ * configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be
+ * called
+  *         to update SystemCoreClock variable value. Otherwise, any
+ * configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the
+ * HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the
+ * HSE_VALUE(**)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the
+ * HSE_VALUE(**)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file
+ * (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file
+ * (its value
+  *              depends on the application requirements), user has to ensure
+ * that HSE_VALUE
+  *              is same as the real frequency of the crystal used. Otherwise,
+ * this function
+  *              may have wrong result.
+  *
+  *         - The result of this function could be not correct when using
+ * fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+	uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+
+	/* Get SYSCLK source
+	 * -------------------------------------------------------*/
+	tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+	switch (tmp) {
+	case 0x00: /* HSI used as system clock source */
+		SystemCoreClock = HSI_VALUE;
+		break;
+	case 0x04: /* HSE used as system clock source */
+		SystemCoreClock = HSE_VALUE;
+		break;
+	case 0x08: /* PLL used as system clock source */
+
+		/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+		   SYSCLK = PLL_VCO / PLL_P
+		   */
+		pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+		pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+		if (pllsource != 0) {
+			/* HSE used as PLL clock source */
+			pllvco = (HSE_VALUE / pllm) *
+				 ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+		} else {
+			/* HSI used as PLL clock source */
+			pllvco = (HSI_VALUE / pllm) *
+				 ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+		}
+
+		pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> 16) + 1) * 2;
+		SystemCoreClock = pllvco / pllp;
+		break;
+	default:
+		SystemCoreClock = HSI_VALUE;
+		break;
+	}
+	/* Compute HCLK frequency
+	 * --------------------------------------------------*/
+	/* Get HCLK prescaler */
+	tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+	/* HCLK frequency */
+	SystemCoreClock >>= tmp;
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
--- a/demos/stm32f429_disco/usb_msc_lwext4.c
+++ b/demos/stm32f429_disco/usb_msc_lwext4.c
@@ -1,221 +1,203 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <ext4_config.h>
-#include <ext4_blockdev.h>
-#include <ext4_errno.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <string.h>
-#include <fcntl.h>
-
-
-#include <hw_init.h>
-#include <usbh_core.h>
-#include <usbh_msc.h>
-
-#include <usb_msc_lwext4.h>
-#include "../../blockdev/test_lwext4.h"
-
-extern USBH_HandleTypeDef hUSB_Host;
-
-/**@brief   Block size.*/
-#define USB_MSC_BLOCK_SIZE          512
-
-/**@brief   MBR_block ID*/
-#define MBR_BLOCK_ID                0
-#define MBR_PART_TABLE_OFF          446
-
-struct part_tab_entry {
-    uint8_t  status;
-    uint8_t  chs1[3];
-    uint8_t  type;
-    uint8_t  chs2[3];
-    uint32_t first_lba;
-    uint32_t sectors;
-}__attribute__((packed));
-
-/**@brief   Partition block offset*/
-static uint32_t part_offset;
-
-/**@brief IO timings*/
-struct usb_msc_io_timings {
-    uint64_t acc_bread;
-    uint64_t acc_bwrite;
-
-    uint32_t cnt_bread;
-    uint32_t cnt_bwrite;
-
-    uint32_t av_bread;
-    uint32_t av_bwrite;
-};
-
-
-static struct usb_msc_io_timings io_timings;
-
-
-void io_timings_clear(void)
-{
-    memset(&io_timings, 0, sizeof(struct usb_msc_io_timings));
-}
-
-const struct ext4_io_stats * io_timings_get(uint32_t time_sum_ms)
-{
-    static struct ext4_io_stats s;
-
-    s.io_read = (((float)io_timings.acc_bread * 100.0) / time_sum_ms);
-    s.io_read /= 1000.0;
-
-    s.io_write= (((float)io_timings.acc_bwrite * 100.0) / time_sum_ms);
-    s.io_write /= 1000.0;
-
-    s.cpu = 100.0 - s.io_read - s.io_write;
-
-    return &s;
-}
-
-
-/**********************BLOCKDEV INTERFACE**************************************/
-static int usb_msc_open(struct ext4_blockdev *bdev);
-static int usb_msc_bread(struct ext4_blockdev *bdev, void *buf, uint64_t blk_id,
-    uint32_t blk_cnt);
-static int usb_msc_bwrite(struct ext4_blockdev *bdev, const void *buf,
-    uint64_t blk_id, uint32_t blk_cnt);
-static int usb_msc_close(struct  ext4_blockdev *bdev);
-
-
-/******************************************************************************/
-EXT4_BLOCKDEV_STATIC_INSTANCE(
-    _usb_msc,
-    USB_MSC_BLOCK_SIZE,
-    0,
-    usb_msc_open,
-    usb_msc_bread,
-    usb_msc_bwrite,
-    usb_msc_close
-);
-
-/******************************************************************************/
-EXT4_BCACHE_STATIC_INSTANCE(_usb_msc_cache, CONFIG_BLOCK_DEV_CACHE_SIZE, EXT_LOGICAL_BLOCK_SIZE);
-
-/******************************************************************************/
-
-static int usb_msc_open(struct ext4_blockdev *bdev)
-{
-    (void)bdev;
-
-    static uint8_t mbr[512];
-    struct part_tab_entry *part0;
-    uint8_t status;
-
-    if(!hw_usb_connected())
-        return EIO;
-
-    status = USBH_MSC_Read(&hUSB_Host, 0, 0, mbr, 1);
-    if(status != USBH_OK)
-        return EIO;
-
-    part0 = (struct part_tab_entry *)(mbr + MBR_PART_TABLE_OFF);
-
-    MSC_LUNTypeDef lun;
-    USBH_MSC_GetLUNInfo(&hUSB_Host, 0, &lun);
-
-    part_offset = part0->first_lba;
-    _usb_msc.ph_bcnt = lun.capacity.block_nbr;
-
-    return hw_usb_connected() ? EOK : EIO;
-}
-
-static int usb_msc_bread(struct ext4_blockdev *bdev, void *buf, uint64_t blk_id,
-    uint32_t blk_cnt)
-{
-    uint8_t status;
-
-    uint64_t v = tim_get_us();
-
-    if(!hw_usb_connected())
-        return EIO;
-
-    while(!USBH_MSC_UnitIsReady(&hUSB_Host, 0))
-    	;
-
-    status = USBH_MSC_Read(&hUSB_Host, 0, blk_id + part_offset, buf, blk_cnt);
-    if(status != USBH_OK)
-        return EIO;
-
-    io_timings.acc_bread += tim_get_us() - v;
-    io_timings.cnt_bread++;
-    io_timings.av_bread = io_timings.acc_bread / io_timings.cnt_bread;
-
-    return EOK;
-
-}
-
-static int usb_msc_bwrite(struct ext4_blockdev *bdev, const void *buf,
-    uint64_t blk_id, uint32_t blk_cnt)
-{
-    uint8_t status;
-
-    uint64_t v = tim_get_us();
-
-    if(!hw_usb_connected())
-        return EIO;
-
-    while(!USBH_MSC_UnitIsReady(&hUSB_Host, 0))
-    	;
-
-    status = USBH_MSC_Write(&hUSB_Host, 0, blk_id + part_offset, (void *)buf, blk_cnt);
-    if(status != USBH_OK)
-        return EIO;
-
-    io_timings.acc_bwrite += tim_get_us() - v;
-    io_timings.cnt_bwrite++;
-    io_timings.av_bwrite = io_timings.acc_bwrite / io_timings.cnt_bwrite;
-
-    return EOK;
-}
-
-static int usb_msc_close(struct  ext4_blockdev *bdev)
-{
-    (void)bdev;
-    return EOK;
-}
-
-/******************************************************************************/
-
-struct ext4_bcache*   ext4_usb_msc_cache_get(void)
-{
-    return &_usb_msc_cache;
-}
-
-
-struct ext4_blockdev* ext4_usb_msc_get(void)
-{
-    return &_usb_msc;
-}
-
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <ext4_config.h>
+#include <ext4_blockdev.h>
+#include <ext4_errno.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <string.h>
+#include <fcntl.h>
+
+#include <hw_init.h>
+#include <usbh_core.h>
+#include <usbh_msc.h>
+
+#include <usb_msc_lwext4.h>
+#include "../../blockdev/test_lwext4.h"
+
+extern USBH_HandleTypeDef hUSB_Host;
+
+/**@brief   Block size.*/
+#define USB_MSC_BLOCK_SIZE 512
+
+/**@brief   MBR_block ID*/
+#define MBR_BLOCK_ID 0
+#define MBR_PART_TABLE_OFF 446
+
+struct part_tab_entry {
+	uint8_t status;
+	uint8_t chs1[3];
+	uint8_t type;
+	uint8_t chs2[3];
+	uint32_t first_lba;
+	uint32_t sectors;
+} __attribute__((packed));
+
+/**@brief   Partition block offset*/
+static uint32_t part_offset;
+
+/**@brief IO timings*/
+struct usb_msc_io_timings {
+	uint64_t acc_bread;
+	uint64_t acc_bwrite;
+
+	uint32_t cnt_bread;
+	uint32_t cnt_bwrite;
+
+	uint32_t av_bread;
+	uint32_t av_bwrite;
+};
+
+static struct usb_msc_io_timings io_timings;
+
+void io_timings_clear(void)
+{
+	memset(&io_timings, 0, sizeof(struct usb_msc_io_timings));
+}
+
+const struct ext4_io_stats *io_timings_get(uint32_t time_sum_ms)
+{
+	static struct ext4_io_stats s;
+
+	s.io_read = (((float)io_timings.acc_bread * 100.0) / time_sum_ms);
+	s.io_read /= 1000.0;
+
+	s.io_write = (((float)io_timings.acc_bwrite * 100.0) / time_sum_ms);
+	s.io_write /= 1000.0;
+
+	s.cpu = 100.0 - s.io_read - s.io_write;
+
+	return &s;
+}
+
+/**********************BLOCKDEV INTERFACE**************************************/
+static int usb_msc_open(struct ext4_blockdev *bdev);
+static int usb_msc_bread(struct ext4_blockdev *bdev, void *buf, uint64_t blk_id,
+			 uint32_t blk_cnt);
+static int usb_msc_bwrite(struct ext4_blockdev *bdev, const void *buf,
+			  uint64_t blk_id, uint32_t blk_cnt);
+static int usb_msc_close(struct ext4_blockdev *bdev);
+
+/******************************************************************************/
+EXT4_BLOCKDEV_STATIC_INSTANCE(_usb_msc, USB_MSC_BLOCK_SIZE, 0, usb_msc_open,
+			      usb_msc_bread, usb_msc_bwrite, usb_msc_close);
+
+/******************************************************************************/
+EXT4_BCACHE_STATIC_INSTANCE(_usb_msc_cache, CONFIG_BLOCK_DEV_CACHE_SIZE,
+			    EXT_LOGICAL_BLOCK_SIZE);
+
+/******************************************************************************/
+
+static int usb_msc_open(struct ext4_blockdev *bdev)
+{
+	(void)bdev;
+
+	static uint8_t mbr[512];
+	struct part_tab_entry *part0;
+	uint8_t status;
+
+	if (!hw_usb_connected())
+		return EIO;
+
+	status = USBH_MSC_Read(&hUSB_Host, 0, 0, mbr, 1);
+	if (status != USBH_OK)
+		return EIO;
+
+	part0 = (struct part_tab_entry *)(mbr + MBR_PART_TABLE_OFF);
+
+	MSC_LUNTypeDef lun;
+	USBH_MSC_GetLUNInfo(&hUSB_Host, 0, &lun);
+
+	part_offset = part0->first_lba;
+	_usb_msc.ph_bcnt = lun.capacity.block_nbr;
+
+	return hw_usb_connected() ? EOK : EIO;
+}
+
+static int usb_msc_bread(struct ext4_blockdev *bdev, void *buf, uint64_t blk_id,
+			 uint32_t blk_cnt)
+{
+	uint8_t status;
+
+	uint64_t v = tim_get_us();
+
+	if (!hw_usb_connected())
+		return EIO;
+
+	while (!USBH_MSC_UnitIsReady(&hUSB_Host, 0))
+		;
+
+	status =
+	    USBH_MSC_Read(&hUSB_Host, 0, blk_id + part_offset, buf, blk_cnt);
+	if (status != USBH_OK)
+		return EIO;
+
+	io_timings.acc_bread += tim_get_us() - v;
+	io_timings.cnt_bread++;
+	io_timings.av_bread = io_timings.acc_bread / io_timings.cnt_bread;
+
+	return EOK;
+}
+
+static int usb_msc_bwrite(struct ext4_blockdev *bdev, const void *buf,
+			  uint64_t blk_id, uint32_t blk_cnt)
+{
+	uint8_t status;
+
+	uint64_t v = tim_get_us();
+
+	if (!hw_usb_connected())
+		return EIO;
+
+	while (!USBH_MSC_UnitIsReady(&hUSB_Host, 0))
+		;
+
+	status = USBH_MSC_Write(&hUSB_Host, 0, blk_id + part_offset,
+				(void *)buf, blk_cnt);
+	if (status != USBH_OK)
+		return EIO;
+
+	io_timings.acc_bwrite += tim_get_us() - v;
+	io_timings.cnt_bwrite++;
+	io_timings.av_bwrite = io_timings.acc_bwrite / io_timings.cnt_bwrite;
+
+	return EOK;
+}
+
+static int usb_msc_close(struct ext4_blockdev *bdev)
+{
+	(void)bdev;
+	return EOK;
+}
+
+/******************************************************************************/
+
+struct ext4_bcache *ext4_usb_msc_cache_get(void) { return &_usb_msc_cache; }
+
+struct ext4_blockdev *ext4_usb_msc_get(void) { return &_usb_msc; }
--- a/demos/stm32f429_disco/usb_msc_lwext4.h
+++ b/demos/stm32f429_disco/usb_msc_lwext4.h
@@ -1,43 +1,43 @@
-/*
- * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the distribution.
- * - The name of the author may not be used to endorse or promote products
- *   derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-#ifndef USB_MSC_LWEXT4_H_
-#define USB_MSC_LWEXT4_H_
-
-#include <ext4_config.h>
-#include <ext4_blockdev.h>
-
-#include <stdint.h>
-#include <stdbool.h>
-
-/**@brief   USB MSC cache get.*/
-struct ext4_bcache*   ext4_usb_msc_cache_get(void);
-
-/**@brief   USB MSC blockdev get.*/
-struct ext4_blockdev* ext4_usb_msc_get(void);
-
-#endif /* USB_MSC_LWEXT4_H_ */
+/*
+ * Copyright (c) 2013 Grzegorz Kostka (kostka.grzegorz@gmail.com)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef USB_MSC_LWEXT4_H_
+#define USB_MSC_LWEXT4_H_
+
+#include <ext4_config.h>
+#include <ext4_blockdev.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/**@brief   USB MSC cache get.*/
+struct ext4_bcache *ext4_usb_msc_cache_get(void);
+
+/**@brief   USB MSC blockdev get.*/
+struct ext4_blockdev *ext4_usb_msc_get(void);
+
+#endif /* USB_MSC_LWEXT4_H_ */
--- a/demos/stm32f429_disco/vectors.c
+++ b/demos/stm32f429_disco/vectors.c
@@ -1,473 +1,577 @@
-/** \file vectors.c
- * \brief STM32F4x vector table and __Default_Handler()
- * \details STM32F4x vector table and __Default_Handler()
- * \author Freddie Chopin, http://www.freddiechopin.info/
- * \date 2012-03-15
- */
-
-/******************************************************************************
-* chip: STM32F4x
-* compiler: arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 4.6.2
-* 	20110921 (release) [ARM/embedded-4_6-branch revision 182083]
-******************************************************************************/
-
-/*------------------------------------------------------------------------*//**
-* \brief Default interrupt handler.
-* \details Default interrupt handler, used for interrupts that don't have their
-* own handler defined.
-*//*-------------------------------------------------------------------------*/
-
-static void __Default_Handler(void) __attribute__ ((interrupt));
-static void __Default_Handler(void)
-{
-	while (1);
-}
-
-/*
-+=============================================================================+
-| assign all unhandled interrupts to the default handler
-+=============================================================================+
-*/
-
-// Non-maskable interrupt (RCC clock security system)
-void NMI_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// All class of fault
-void HardFault_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Memory management
-void MemManage_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Pre-fetch fault, memory access fault
-void BusFault_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Undefined instruction or illegal state
-void UsageFault_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Reserved 0x1C
-void __Reserved_0x1C_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Reserved 0x20
-void __Reserved_0x20_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Reserved 0x24
-void __Reserved_0x24_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Reserved 0x28
-void __Reserved_0x28_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// System service call via SWI instruction
-void SVC_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Debug monitor
-void DebugMon_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Reserved 0x34
-void __Reserved_0x34_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Pendable request for system service
-void PendSV_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// System tick timer
-void SysTick_Handler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Window WatchDog
-void WWDG_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// PVD through EXTI Line detection
-void PVD_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Tamper and TimeStamps through the EXTI line
-void TAMP_STAMP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// RTC Wakeup through the EXTI line
-void RTC_WKUP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// FLASH
-void FLASH_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// RCC
-void RCC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// EXTI Line0
-void EXTI0_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// EXTI Line1
-void EXTI1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// EXTI Line2
-void EXTI2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// EXTI Line3
-void EXTI3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// EXTI Line4
-void EXTI4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 0
-void DMA1_Stream0_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 1
-void DMA1_Stream1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 2
-void DMA1_Stream2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 3
-void DMA1_Stream3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 4
-void DMA1_Stream4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 5
-void DMA1_Stream5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream 6
-void DMA1_Stream6_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// ADC1, ADC2 and ADC3s
-void ADC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN1 TX
-void CAN1_TX_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN1 RX0
-void CAN1_RX0_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN1 RX1
-void CAN1_RX1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN1 SCE
-void CAN1_SCE_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// External Line[9:5]s
-void EXTI9_5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM1 Break and TIM9
-void TIM1_BRK_TIM9_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM1 Update and TIM10
-void TIM1_UP_TIM10_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM1 Trigger and Commutation and TIM11
-void TIM1_TRG_COM_TIM11_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM1 Capture Compare
-void TIM1_CC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM2
-void TIM2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM3
-void TIM3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM4
-void TIM4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C1 Event
-void I2C1_EV_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C1 Error
-void I2C1_ER_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C2 Event
-void I2C2_EV_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C2 Error
-void I2C2_ER_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI1
-void SPI1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI2
-void SPI2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USART1
-void USART1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USART2
-void USART2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USART3
-void USART3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// External Line[15:10]s
-void EXTI15_10_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// RTC Alarm (A and B) through EXTI Line
-void RTC_Alarm_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG FS Wakeup through EXTI line
-void OTG_FS_WKUP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM8 Break and TIM12
-void TIM8_BRK_TIM12_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM8 Update and TIM13
-void TIM8_UP_TIM13_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM8 Trigger and Commutation and TIM14
-void TIM8_TRG_COM_TIM14_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM8 Capture Compare
-void TIM8_CC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA1 Stream7
-void DMA1_Stream7_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// FSMC
-void FSMC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SDIO
-void SDIO_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM5
-void TIM5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI3
-void SPI3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// UART4
-void UART4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// UART5
-void UART5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM6 and DAC1&2 underrun errors
-void TIM6_DAC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// TIM7
-void TIM7_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 0
-void DMA2_Stream0_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 1
-void DMA2_Stream1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 2
-void DMA2_Stream2_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 3
-void DMA2_Stream3_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 4
-void DMA2_Stream4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Ethernet
-void ETH_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Ethernet Wakeup through EXTI line
-void ETH_WKUP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN2 TX
-void CAN2_TX_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN2 RX0
-void CAN2_RX0_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN2 RX1
-void CAN2_RX1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CAN2 SCE
-void CAN2_SCE_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG FS
-void OTG_FS_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 5
-void DMA2_Stream5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 6
-void DMA2_Stream6_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2 Stream 7
-void DMA2_Stream7_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USART6
-void USART6_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C3 event
-void I2C3_EV_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// I2C3 error
-void I2C3_ER_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG HS End Point 1 Out
-void OTG_HS_EP1_OUT_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG HS End Point 1 In
-void OTG_HS_EP1_IN_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG HS Wakeup through EXTI
-void OTG_HS_WKUP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// USB OTG HS
-void OTG_HS_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DCMI
-void DCMI_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// CRYP crypto
-void CRYP_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// Hash and Rng
-void HASH_RNG_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// FPU
-void FPU_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// UART7
-void UART7_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// UART8
-void UART8_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI4
-void SPI4_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI5
-void SPI5_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SPI6
-void SPI6_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// SAI1
-void SAI1_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// LTDC
-void LTDC_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// LTDC_ER
-void LTDC_ER_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-// DMA2D
-void DMA2D_IRQHandler(void) __attribute__ ((interrupt, weak, alias("__Default_Handler")));
-
-
-/*
-+=============================================================================+
-| Vector table
-+=============================================================================+
-*/
-
-extern const char __main_stack_end;			// imported main stack end (from linker script)
-
-void Reset_Handler(void);					// import the address of Reset_Handler()
-
-void (* const vectors[])(void) __attribute__ ((section(".vectors"))) = {
-		(void (*)(void))&__main_stack_end,	// Main stack end address
-		Reset_Handler,						// Reset
-		NMI_Handler,						// Non-maskable interrupt (RCC clock security system)
-		HardFault_Handler,					// All class of fault
-		MemManage_Handler,					// Memory management
-		BusFault_Handler,					// Pre-fetch fault, memory access fault
-		UsageFault_Handler,					// Undefined instruction or illegal state
-		__Reserved_0x1C_Handler,			// Reserved 0x1C
-		__Reserved_0x20_Handler,			// Reserved 0x20
-		__Reserved_0x24_Handler,			// Reserved 0x24
-		__Reserved_0x28_Handler,			// Reserved 0x28
-		SVC_Handler,						// System service call via SWI instruction
-		DebugMon_Handler,					// Debug monitor
-		__Reserved_0x34_Handler,			// Reserved 0x34
-		PendSV_Handler,						// Pendable request for system service
-		SysTick_Handler,					// System tick timer
-
-		WWDG_IRQHandler,                   /* Window WatchDog                              */
-		PVD_IRQHandler,                    /* PVD through EXTI Line detection              */
-		TAMP_STAMP_IRQHandler,             /* Tamper and TimeStamps through the EXTI line  */
-		RTC_WKUP_IRQHandler,               /* RTC Wakeup through the EXTI line             */
-		FLASH_IRQHandler,                  /* FLASH                                        */
-		RCC_IRQHandler,                    /* RCC                                          */
-		EXTI0_IRQHandler,                  /* EXTI Line0                                   */
-		EXTI1_IRQHandler,                  /* EXTI Line1                                   */
-		EXTI2_IRQHandler,                  /* EXTI Line2                                   */
-		EXTI3_IRQHandler,                  /* EXTI Line3                                   */
-		EXTI4_IRQHandler,                  /* EXTI Line4                   */
-		DMA1_Stream0_IRQHandler,           /* DMA1 Stream 0                */
-		DMA1_Stream1_IRQHandler,           /* DMA1 Stream 1                */
-		DMA1_Stream2_IRQHandler,           /* DMA1 Stream 2                */
-		DMA1_Stream3_IRQHandler,           /* DMA1 Stream 3                */
-		DMA1_Stream4_IRQHandler,           /* DMA1 Stream 4                */
-		DMA1_Stream5_IRQHandler,           /* DMA1 Stream 5                */
-		DMA1_Stream6_IRQHandler,           /* DMA1 Stream 6                */
-		ADC_IRQHandler,                    /* ADC1, ADC2 and ADC3s         */
-		CAN1_TX_IRQHandler,                /* CAN1 TX                      */
-		CAN1_RX0_IRQHandler,               /* CAN1 RX0                     */
-		CAN1_RX1_IRQHandler,               /* CAN1 RX1                     */
-		CAN1_SCE_IRQHandler,               /* CAN1 SCE                     */
-		EXTI9_5_IRQHandler,                /* External Line[9:5]s          */
-		TIM1_BRK_TIM9_IRQHandler,          /* TIM1 Break and TIM9          */
-		TIM1_UP_TIM10_IRQHandler,          /* TIM1 Update and TIM10        */
-		TIM1_TRG_COM_TIM11_IRQHandler,     /* TIM1 Trigger and Commutation and TIM11 */
-		TIM1_CC_IRQHandler,                /* TIM1 Capture Compare         */
-		TIM2_IRQHandler,                   /* TIM2                         */
-		TIM3_IRQHandler,                   /* TIM3                         */
-		TIM4_IRQHandler,                   /* TIM4                         */
-		I2C1_EV_IRQHandler,                /* I2C1 Event                   */
-		I2C1_ER_IRQHandler,                /* I2C1 Error                   */
-		I2C2_EV_IRQHandler,                /* I2C2 Event                   */
-		I2C2_ER_IRQHandler,                /* I2C2 Error                   */
-		SPI1_IRQHandler,                   /* SPI1                         */
-		SPI2_IRQHandler,                   /* SPI2                         */
-		USART1_IRQHandler,                 /* USART1                       */
-		USART2_IRQHandler,                 /* USART2                       */
-		USART3_IRQHandler,                 /* USART3                       */
-		EXTI15_10_IRQHandler,              /* External Line[15:10]s        */
-		RTC_Alarm_IRQHandler,              /* RTC Alarm (A and B) through EXTI Line */
-		OTG_FS_WKUP_IRQHandler,            /* USB OTG FS Wakeup through EXTI line */
-		TIM8_BRK_TIM12_IRQHandler,         /* TIM8 Break and TIM12         */
-		TIM8_UP_TIM13_IRQHandler,          /* TIM8 Update and TIM13        */
-		TIM8_TRG_COM_TIM14_IRQHandler,     /* TIM8 Trigger and Commutation and TIM14 */
-		TIM8_CC_IRQHandler,                /* TIM8 Capture Compare         */
-		DMA1_Stream7_IRQHandler,           /* DMA1 Stream7                 */
-		FSMC_IRQHandler,                   /* FSMC                         */
-		SDIO_IRQHandler,                   /* SDIO                         */
-		TIM5_IRQHandler,                   /* TIM5                         */
-		SPI3_IRQHandler,                   /* SPI3                         */
-		UART4_IRQHandler,                  /* UART4                        */
-		UART5_IRQHandler,                  /* UART5                        */
-		TIM6_DAC_IRQHandler,               /* TIM6 and DAC1&2 underrun errors */
-		TIM7_IRQHandler,                   /* TIM7                         */
-		DMA2_Stream0_IRQHandler,           /* DMA2 Stream 0                */
-		DMA2_Stream1_IRQHandler,           /* DMA2 Stream 1                */
-		DMA2_Stream2_IRQHandler,           /* DMA2 Stream 2                */
-		DMA2_Stream3_IRQHandler,           /* DMA2 Stream 3                */
-		DMA2_Stream4_IRQHandler,           /* DMA2 Stream 4                */
-		ETH_IRQHandler,                    /* Ethernet                     */
-		ETH_WKUP_IRQHandler,               /* Ethernet Wakeup through EXTI line */
-		CAN2_TX_IRQHandler,                /* CAN2 TX                      */
-		CAN2_RX0_IRQHandler,               /* CAN2 RX0                     */
-		CAN2_RX1_IRQHandler,               /* CAN2 RX1                     */
-		CAN2_SCE_IRQHandler,               /* CAN2 SCE                     */
-		OTG_FS_IRQHandler,                 /* USB OTG FS                   */
-		DMA2_Stream5_IRQHandler,           /* DMA2 Stream 5                */
-		DMA2_Stream6_IRQHandler,           /* DMA2 Stream 6                */
-		DMA2_Stream7_IRQHandler,           /* DMA2 Stream 7                */
-		USART6_IRQHandler,                 /* USART6                       */
-		I2C3_EV_IRQHandler,                /* I2C3 event                   */
-		I2C3_ER_IRQHandler,                /* I2C3 error                   */
-		OTG_HS_EP1_OUT_IRQHandler,         /* USB OTG HS End Point 1 Out   */
-		OTG_HS_EP1_IN_IRQHandler,          /* USB OTG HS End Point 1 In    */
-		OTG_HS_WKUP_IRQHandler,            /* USB OTG HS Wakeup through EXTI */
-		OTG_HS_IRQHandler,                 /* USB OTG HS                   */
-		DCMI_IRQHandler,                   /* DCMI                         */
-		CRYP_IRQHandler,                   /* CRYP crypto                  */
-		HASH_RNG_IRQHandler,               /* Hash and Rng                 */
-		FPU_IRQHandler,                    /* FPU                          */
-		UART7_IRQHandler,                  /* UART7                        */
-		UART8_IRQHandler,                  /* UART8                        */
-		SPI4_IRQHandler,                   /* SPI4                         */
-		SPI5_IRQHandler,                   /* SPI5                         */
-		SPI6_IRQHandler,                   /* SPI6                         */
-		SAI1_IRQHandler,                   /* SAI1                         */
-		LTDC_IRQHandler,                   /* LTDC                         */
-		LTDC_ER_IRQHandler,                /* LTDC error                   */
-		DMA2D_IRQHandler                   /* DMA2D                        */
-};
-
-
-
-/******************************************************************************
-* END OF FILE
-******************************************************************************/
+/** \file vectors.c
+ * \brief STM32F4x vector table and __Default_Handler()
+ * \details STM32F4x vector table and __Default_Handler()
+ * \author Freddie Chopin, http://www.freddiechopin.info/
+ * \date 2012-03-15
+ */
+
+/******************************************************************************
+* chip: STM32F4x
+* compiler: arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 4.6.2
+* 	20110921 (release) [ARM/embedded-4_6-branch revision 182083]
+******************************************************************************/
+
+/*------------------------------------------------------------------------*/ /**
+* \brief Default interrupt handler.
+* \details Default interrupt handler, used for interrupts that don't have their
+* own handler defined.
+*/ /*-------------------------------------------------------------------------*/
+
+static void __Default_Handler(void) __attribute__((interrupt));
+static void __Default_Handler(void)
+{
+	while (1)
+		;
+}
+
+/*
++=============================================================================+
+| assign all unhandled interrupts to the default handler
++=============================================================================+
+*/
+
+// Non-maskable interrupt (RCC clock security system)
+void NMI_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// All class of fault
+void HardFault_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Memory management
+void MemManage_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Pre-fetch fault, memory access fault
+void BusFault_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Undefined instruction or illegal state
+void UsageFault_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Reserved 0x1C
+void __Reserved_0x1C_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Reserved 0x20
+void __Reserved_0x20_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Reserved 0x24
+void __Reserved_0x24_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Reserved 0x28
+void __Reserved_0x28_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// System service call via SWI instruction
+void SVC_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Debug monitor
+void DebugMon_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Reserved 0x34
+void __Reserved_0x34_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Pendable request for system service
+void PendSV_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// System tick timer
+void SysTick_Handler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Window WatchDog
+void WWDG_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// PVD through EXTI Line detection
+void PVD_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Tamper and TimeStamps through the EXTI line
+void TAMP_STAMP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// RTC Wakeup through the EXTI line
+void RTC_WKUP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// FLASH
+void FLASH_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// RCC
+void RCC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// EXTI Line0
+void EXTI0_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// EXTI Line1
+void EXTI1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// EXTI Line2
+void EXTI2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// EXTI Line3
+void EXTI3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// EXTI Line4
+void EXTI4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 0
+void DMA1_Stream0_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 1
+void DMA1_Stream1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 2
+void DMA1_Stream2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 3
+void DMA1_Stream3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 4
+void DMA1_Stream4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 5
+void DMA1_Stream5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream 6
+void DMA1_Stream6_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// ADC1, ADC2 and ADC3s
+void ADC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN1 TX
+void CAN1_TX_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN1 RX0
+void CAN1_RX0_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN1 RX1
+void CAN1_RX1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN1 SCE
+void CAN1_SCE_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// External Line[9:5]s
+void EXTI9_5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM1 Break and TIM9
+void TIM1_BRK_TIM9_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM1 Update and TIM10
+void TIM1_UP_TIM10_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM1 Trigger and Commutation and TIM11
+void TIM1_TRG_COM_TIM11_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM1 Capture Compare
+void TIM1_CC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM2
+void TIM2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM3
+void TIM3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM4
+void TIM4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C1 Event
+void I2C1_EV_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C1 Error
+void I2C1_ER_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C2 Event
+void I2C2_EV_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C2 Error
+void I2C2_ER_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI1
+void SPI1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI2
+void SPI2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USART1
+void USART1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USART2
+void USART2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USART3
+void USART3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// External Line[15:10]s
+void EXTI15_10_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// RTC Alarm (A and B) through EXTI Line
+void RTC_Alarm_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG FS Wakeup through EXTI line
+void OTG_FS_WKUP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM8 Break and TIM12
+void TIM8_BRK_TIM12_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM8 Update and TIM13
+void TIM8_UP_TIM13_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM8 Trigger and Commutation and TIM14
+void TIM8_TRG_COM_TIM14_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM8 Capture Compare
+void TIM8_CC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA1 Stream7
+void DMA1_Stream7_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// FSMC
+void FSMC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SDIO
+void SDIO_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM5
+void TIM5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI3
+void SPI3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// UART4
+void UART4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// UART5
+void UART5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM6 and DAC1&2 underrun errors
+void TIM6_DAC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// TIM7
+void TIM7_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 0
+void DMA2_Stream0_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 1
+void DMA2_Stream1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 2
+void DMA2_Stream2_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 3
+void DMA2_Stream3_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 4
+void DMA2_Stream4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Ethernet
+void ETH_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Ethernet Wakeup through EXTI line
+void ETH_WKUP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN2 TX
+void CAN2_TX_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN2 RX0
+void CAN2_RX0_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN2 RX1
+void CAN2_RX1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CAN2 SCE
+void CAN2_SCE_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG FS
+void OTG_FS_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 5
+void DMA2_Stream5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 6
+void DMA2_Stream6_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2 Stream 7
+void DMA2_Stream7_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USART6
+void USART6_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C3 event
+void I2C3_EV_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// I2C3 error
+void I2C3_ER_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG HS End Point 1 Out
+void OTG_HS_EP1_OUT_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG HS End Point 1 In
+void OTG_HS_EP1_IN_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG HS Wakeup through EXTI
+void OTG_HS_WKUP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// USB OTG HS
+void OTG_HS_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DCMI
+void DCMI_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// CRYP crypto
+void CRYP_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// Hash and Rng
+void HASH_RNG_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// FPU
+void FPU_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// UART7
+void UART7_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// UART8
+void UART8_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI4
+void SPI4_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI5
+void SPI5_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SPI6
+void SPI6_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// SAI1
+void SAI1_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// LTDC
+void LTDC_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// LTDC_ER
+void LTDC_ER_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+// DMA2D
+void DMA2D_IRQHandler(void)
+    __attribute__((interrupt, weak, alias("__Default_Handler")));
+
+/*
++=============================================================================+
+| Vector table
++=============================================================================+
+*/
+
+extern const char
+    __main_stack_end; // imported main stack end (from linker script)
+
+void Reset_Handler(void); // import the address of Reset_Handler()
+
+void (*const vectors[])(void) __attribute__((section(".vectors"))) = {
+    (void (*)(void)) & __main_stack_end, // Main stack end address
+    Reset_Handler,			 // Reset
+    NMI_Handler,	// Non-maskable interrupt (RCC clock security system)
+    HardFault_Handler,  // All class of fault
+    MemManage_Handler,  // Memory management
+    BusFault_Handler,   // Pre-fetch fault, memory access fault
+    UsageFault_Handler, // Undefined instruction or illegal state
+    __Reserved_0x1C_Handler, // Reserved 0x1C
+    __Reserved_0x20_Handler, // Reserved 0x20
+    __Reserved_0x24_Handler, // Reserved 0x24
+    __Reserved_0x28_Handler, // Reserved 0x28
+    SVC_Handler,	     // System service call via SWI instruction
+    DebugMon_Handler,	// Debug monitor
+    __Reserved_0x34_Handler, // Reserved 0x34
+    PendSV_Handler,	  // Pendable request for system service
+    SysTick_Handler,	 // System tick timer
+
+    WWDG_IRQHandler,	  /* Window WatchDog                              */
+    PVD_IRQHandler,	   /* PVD through EXTI Line detection              */
+    TAMP_STAMP_IRQHandler,    /* Tamper and TimeStamps through the EXTI line  */
+    RTC_WKUP_IRQHandler,      /* RTC Wakeup through the EXTI line             */
+    FLASH_IRQHandler,	 /* FLASH                                        */
+    RCC_IRQHandler,	   /* RCC                                          */
+    EXTI0_IRQHandler,	 /* EXTI Line0                                   */
+    EXTI1_IRQHandler,	 /* EXTI Line1                                   */
+    EXTI2_IRQHandler,	 /* EXTI Line2                                   */
+    EXTI3_IRQHandler,	 /* EXTI Line3                                   */
+    EXTI4_IRQHandler,	 /* EXTI Line4                   */
+    DMA1_Stream0_IRQHandler,  /* DMA1 Stream 0                */
+    DMA1_Stream1_IRQHandler,  /* DMA1 Stream 1                */
+    DMA1_Stream2_IRQHandler,  /* DMA1 Stream 2                */
+    DMA1_Stream3_IRQHandler,  /* DMA1 Stream 3                */
+    DMA1_Stream4_IRQHandler,  /* DMA1 Stream 4                */
+    DMA1_Stream5_IRQHandler,  /* DMA1 Stream 5                */
+    DMA1_Stream6_IRQHandler,  /* DMA1 Stream 6                */
+    ADC_IRQHandler,	   /* ADC1, ADC2 and ADC3s         */
+    CAN1_TX_IRQHandler,       /* CAN1 TX                      */
+    CAN1_RX0_IRQHandler,      /* CAN1 RX0                     */
+    CAN1_RX1_IRQHandler,      /* CAN1 RX1                     */
+    CAN1_SCE_IRQHandler,      /* CAN1 SCE                     */
+    EXTI9_5_IRQHandler,       /* External Line[9:5]s          */
+    TIM1_BRK_TIM9_IRQHandler, /* TIM1 Break and TIM9          */
+    TIM1_UP_TIM10_IRQHandler, /* TIM1 Update and TIM10        */
+    TIM1_TRG_COM_TIM11_IRQHandler, /* TIM1 Trigger and Commutation and TIM11 */
+    TIM1_CC_IRQHandler,		   /* TIM1 Capture Compare         */
+    TIM2_IRQHandler,		   /* TIM2                         */
+    TIM3_IRQHandler,		   /* TIM3                         */
+    TIM4_IRQHandler,		   /* TIM4                         */
+    I2C1_EV_IRQHandler,		   /* I2C1 Event                   */
+    I2C1_ER_IRQHandler,		   /* I2C1 Error                   */
+    I2C2_EV_IRQHandler,		   /* I2C2 Event                   */
+    I2C2_ER_IRQHandler,		   /* I2C2 Error                   */
+    SPI1_IRQHandler,		   /* SPI1                         */
+    SPI2_IRQHandler,		   /* SPI2                         */
+    USART1_IRQHandler,		   /* USART1                       */
+    USART2_IRQHandler,		   /* USART2                       */
+    USART3_IRQHandler,		   /* USART3                       */
+    EXTI15_10_IRQHandler,	  /* External Line[15:10]s        */
+    RTC_Alarm_IRQHandler,	  /* RTC Alarm (A and B) through EXTI Line */
+    OTG_FS_WKUP_IRQHandler,	/* USB OTG FS Wakeup through EXTI line */
+    TIM8_BRK_TIM12_IRQHandler,     /* TIM8 Break and TIM12         */
+    TIM8_UP_TIM13_IRQHandler,      /* TIM8 Update and TIM13        */
+    TIM8_TRG_COM_TIM14_IRQHandler, /* TIM8 Trigger and Commutation and TIM14 */
+    TIM8_CC_IRQHandler,		   /* TIM8 Capture Compare         */
+    DMA1_Stream7_IRQHandler,       /* DMA1 Stream7                 */
+    FSMC_IRQHandler,		   /* FSMC                         */
+    SDIO_IRQHandler,		   /* SDIO                         */
+    TIM5_IRQHandler,		   /* TIM5                         */
+    SPI3_IRQHandler,		   /* SPI3                         */
+    UART4_IRQHandler,		   /* UART4                        */
+    UART5_IRQHandler,		   /* UART5                        */
+    TIM6_DAC_IRQHandler,	   /* TIM6 and DAC1&2 underrun errors */
+    TIM7_IRQHandler,		   /* TIM7                         */
+    DMA2_Stream0_IRQHandler,       /* DMA2 Stream 0                */
+    DMA2_Stream1_IRQHandler,       /* DMA2 Stream 1                */
+    DMA2_Stream2_IRQHandler,       /* DMA2 Stream 2                */
+    DMA2_Stream3_IRQHandler,       /* DMA2 Stream 3                */
+    DMA2_Stream4_IRQHandler,       /* DMA2 Stream 4                */
+    ETH_IRQHandler,		   /* Ethernet                     */
+    ETH_WKUP_IRQHandler,	   /* Ethernet Wakeup through EXTI line */
+    CAN2_TX_IRQHandler,		   /* CAN2 TX                      */
+    CAN2_RX0_IRQHandler,	   /* CAN2 RX0                     */
+    CAN2_RX1_IRQHandler,	   /* CAN2 RX1                     */
+    CAN2_SCE_IRQHandler,	   /* CAN2 SCE                     */
+    OTG_FS_IRQHandler,		   /* USB OTG FS                   */
+    DMA2_Stream5_IRQHandler,       /* DMA2 Stream 5                */
+    DMA2_Stream6_IRQHandler,       /* DMA2 Stream 6                */
+    DMA2_Stream7_IRQHandler,       /* DMA2 Stream 7                */
+    USART6_IRQHandler,		   /* USART6                       */
+    I2C3_EV_IRQHandler,		   /* I2C3 event                   */
+    I2C3_ER_IRQHandler,		   /* I2C3 error                   */
+    OTG_HS_EP1_OUT_IRQHandler,     /* USB OTG HS End Point 1 Out   */
+    OTG_HS_EP1_IN_IRQHandler,      /* USB OTG HS End Point 1 In    */
+    OTG_HS_WKUP_IRQHandler,	/* USB OTG HS Wakeup through EXTI */
+    OTG_HS_IRQHandler,		   /* USB OTG HS                   */
+    DCMI_IRQHandler,		   /* DCMI                         */
+    CRYP_IRQHandler,		   /* CRYP crypto                  */
+    HASH_RNG_IRQHandler,	   /* Hash and Rng                 */
+    FPU_IRQHandler,		   /* FPU                          */
+    UART7_IRQHandler,		   /* UART7                        */
+    UART8_IRQHandler,		   /* UART8                        */
+    SPI4_IRQHandler,		   /* SPI4                         */
+    SPI5_IRQHandler,		   /* SPI5                         */
+    SPI6_IRQHandler,		   /* SPI6                         */
+    SAI1_IRQHandler,		   /* SAI1                         */
+    LTDC_IRQHandler,		   /* LTDC                         */
+    LTDC_ER_IRQHandler,		   /* LTDC error                   */
+    DMA2D_IRQHandler		   /* DMA2D                        */
+};
+
+/******************************************************************************
+* END OF FILE
+******************************************************************************/