ref: d0d7ad57c219f4dd50578e3105c5f9888a38edad
parent: 8994f1f757d985629c796a565e3a6ffb575adeaa
parent: c31e4e23f2f3a642aba061cf32c36079ee671906
author: HaiboZhu <haibozhu@cisco.com>
date: Wed Sep 16 05:12:07 EDT 2015
Merge pull request #2116 from mstorsjo/remove-tab-indentation Fix indentation to consistently use spaces instead of tabs
--- a/codec/common/inc/mc.h
+++ b/codec/common/inc/mc.h
@@ -304,7 +304,7 @@
void McHorVer22Width4VerLastAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
int32_t iWidth, int32_t iHeight);
void McHorVer22Width4VerLastUnAlign_sse2 (const uint8_t* pTap, int32_t iTapStride, uint8_t* pDst, int32_t iDstStride,
- int32_t iWidth, int32_t iHeight);
+ int32_t iWidth, int32_t iHeight);
//***************************************************************************//
// SSSE3 definition //
--- a/codec/common/src/mc.cpp
+++ b/codec/common/src/mc.cpp
@@ -401,36 +401,36 @@
}
void McHorVer20Width5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
- int32_t iWidth, int32_t iHeight) {- if (iWidth == 17 || iWidth == 9)
- McHorVer20Width9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
- else //if (iWidth == 5)
- McHorVer20Width5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
+ int32_t iWidth, int32_t iHeight) {+ if (iWidth == 17 || iWidth == 9)
+ McHorVer20Width9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
+ else //if (iWidth == 5)
+ McHorVer20Width5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
}
void McHorVer02Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
- int32_t iWidth, int32_t iHeight) {- if (iWidth == 16 || iWidth == 8)
- McHorVer02Height9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
- else //if (iWidth == 4)
- McHorVer02Height5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
+ int32_t iWidth, int32_t iHeight) {+ if (iWidth == 16 || iWidth == 8)
+ McHorVer02Height9Or17_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
+ else //if (iWidth == 4)
+ McHorVer02Height5_sse2 (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight);
}
void McHorVer22Width5Or9Or17Height5Or9Or17_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride,
- int32_t iWidth, int32_t iHeight) {- ENFORCE_STACK_ALIGN_2D (int16_t, pTap, 22, 24, 16)
- if (iWidth == 17 || iWidth == 9){- int32_t tmp1 = 2 * (iWidth - 8);
- McHorVer22HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
- McHorVer22Width8VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
- McHorVer22Width8VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 8, iDstStride, 8, iHeight);
- }
- else{ //if(iWidth == 5)- int32_t tmp1 = 2 * (iWidth - 4);
- McHorVer22Width5HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
- McHorVer22Width4VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
- McHorVer22Width4VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 4, iDstStride, 4, iHeight);
- }
+ int32_t iWidth, int32_t iHeight) {+ ENFORCE_STACK_ALIGN_2D (int16_t, pTap, 22, 24, 16)
+ if (iWidth == 17 || iWidth == 9){+ int32_t tmp1 = 2 * (iWidth - 8);
+ McHorVer22HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
+ McHorVer22Width8VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
+ McHorVer22Width8VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 8, iDstStride, 8, iHeight);
+ }
+ else{ //if(iWidth == 5)+ int32_t tmp1 = 2 * (iWidth - 4);
+ McHorVer22Width5HorFirst_sse2 (pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5);
+ McHorVer22Width4VerLastAlign_sse2 ((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight);
+ McHorVer22Width4VerLastUnAlign_sse2 ((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 4, iDstStride, 4, iHeight);
+ }
}
--- a/codec/decoder/core/inc/wels_const.h
+++ b/codec/decoder/core/inc/wels_const.h
@@ -46,7 +46,7 @@
#define MIN_REF_PIC_COUNT 1 // minimal count number of reference pictures, 1 short + 2 key reference based?
#define MAX_SHORT_REF_COUNT 16 // maximal count number of short reference pictures
#define MAX_LONG_REF_COUNT 16 // maximal count number of long reference pictures
-#define MAX_DPB_COUNT (MAX_REF_PIC_COUNT + 1) // 1 additional position for re-order and other process
+#define MAX_DPB_COUNT (MAX_REF_PIC_COUNT + 1) // 1 additional position for re-order and other process
#define MAX_MMCO_COUNT 66
--- a/codec/encoder/core/src/slice_multi_threading.cpp
+++ b/codec/encoder/core/src/slice_multi_threading.cpp
@@ -1008,7 +1008,7 @@
iIdx = 0;
while (iIdx < kiEventCnt) {- pPriData[iIdx].pFrameBsInfo = pFrameBsInfo;
+ pPriData[iIdx].pFrameBsInfo = pFrameBsInfo;
pPriData[iIdx].iSliceIndex = iIdx;
SetOneSliceBsBufferUnderMultithread (pCtx, iIdx, iIdx);
if (pEventsList[iIdx])
--- a/codec/processing/src/arm/down_sample_neon.S
+++ b/codec/processing/src/arm/down_sample_neon.S
@@ -342,20 +342,20 @@
stmdb sp!, {r4-r8, lr}//Get the width and height
- ldr r4, [sp, #24] //src_width
- ldr r5, [sp, #28] //src_height
+ ldr r4, [sp, #24] //src_width
+ ldr r5, [sp, #28] //src_height
- //Initialize the register
- mov r6, r2
- mov r8, r0
- mov lr, #0
+ //Initialize the register
+ mov r6, r2
+ mov r8, r0
+ mov lr, #0
- //Save the tailer for the un-aligned size
- mla r7, r1, r5, r0
- vld1.32 {q15}, [r7]+ //Save the tailer for the un-aligned size
+ mla r7, r1, r5, r0
+ vld1.32 {q15}, [r7]- add r7, r2, r3
- //processing a colume data
+ add r7, r2, r3
+ //processing a colume data
comp_ds_bilinear_onethird_loop0:
vld3.8 {d0, d1, d2}, [r2]!@@ -389,10 +389,10 @@
addcs r8, r1
movcs r0, r8
subscs r5, #1
- bne comp_ds_bilinear_onethird_loop0
+ bne comp_ds_bilinear_onethird_loop0
- //restore the tailer for the un-aligned size
- vst1.32 {q15}, [r0]+ //restore the tailer for the un-aligned size
+ vst1.32 {q15}, [r0] ldmia sp!, {r4-r8,lr}WELS_ASM_FUNC_END
@@ -401,26 +401,26 @@
stmdb sp!, {r4-r8, lr}//Get the width and height
- ldr r4, [sp, #24] //src_width
- ldr r5, [sp, #28] //src_height
+ ldr r4, [sp, #24] //src_width
+ ldr r5, [sp, #28] //src_height
- //Initialize the register
- mov r6, r2
- mov r8, r0
- mov lr, #0
- lsr r5, #2
+ //Initialize the register
+ mov r6, r2
+ mov r8, r0
+ mov lr, #0
+ lsr r5, #2
- //Save the tailer for the un-aligned size
- mla r7, r1, r5, r0
- vld1.32 {q15}, [r7]+ //Save the tailer for the un-aligned size
+ mla r7, r1, r5, r0
+ vld1.32 {q15}, [r7]- add r7, r2, r3
- //processing a colume data
+ add r7, r2, r3
+ //processing a colume data
comp_ds_bilinear_quarter_loop0:
- vld2.16 {q0, q1}, [r2]!+ vld2.16 {q0, q1}, [r2]! vld2.16 {q2, q3}, [r2]!- vld2.16 {q8, q9}, [r7]!+ vld2.16 {q8, q9}, [r7]! vld2.16 {q10, q11}, [r7]!vpaddl.u8 q0, q0
@@ -447,10 +447,10 @@
addcs r8, r1
movcs r0, r8
subscs r5, #1
- bne comp_ds_bilinear_quarter_loop0
+ bne comp_ds_bilinear_quarter_loop0
- //restore the tailer for the un-aligned size
- vst1.32 {q15}, [r0]+ //restore the tailer for the un-aligned size
+ vst1.32 {q15}, [r0] ldmia sp!, {r4-r8,lr}WELS_ASM_FUNC_END
--- a/codec/processing/src/downsample/downsample.h
+++ b/codec/processing/src/downsample/downsample.h
@@ -66,11 +66,11 @@
typedef SpecificDownsampleFunc* PSpecificDownsampleFunc;
typedef GeneralDownsampleFunc* PGeneralDownsampleFunc;
-HalveDownsampleFunc DyadicBilinearDownsampler_c;
+HalveDownsampleFunc DyadicBilinearDownsampler_c;
GeneralDownsampleFunc GeneralBilinearFastDownsampler_c;
GeneralDownsampleFunc GeneralBilinearAccurateDownsampler_c;
SpecificDownsampleFunc DyadicBilinearOneThirdDownsampler_c;
-SpecificDownsampleFunc DyadicBilinearQuarterDownsampler_c;
+SpecificDownsampleFunc DyadicBilinearQuarterDownsampler_c;
typedef struct {// align_index: 0 = x32; 1 = x16; 2 = x8; 3 = common case left;
--- a/test/encoder_binary_comparison/Scripts/run_BinarySHA1Comparison.sh
+++ b/test/encoder_binary_comparison/Scripts/run_BinarySHA1Comparison.sh
@@ -60,7 +60,7 @@
-sw -sh "-dw 0" "-dh 0" "-dw 1" "-dh 1" "-dw 2" "-dh 2" "-dw 3" "-dh 3" \
"-frout 0" "-frout 1" "-frout 2" "-frout 3" \
"-lqp 0" "-lqp 1" "-lqp 2" "-lqp 3" \
- -rc -fs -tarb "-ltarb 0" "-ltarb 1" "-ltarb 2" "-ltarb 3" \
+ -rc -fs -tarb "-ltarb 0" "-ltarb 1" "-ltarb 2" "-ltarb 3" \
"-slcmd 0" "-slcnum 0" "-slcmd 1" "-slcnum 1"\
"-slcmd 2" "-slcnum 2" "-slcmd 3" "-slcnum 3"\
-nalsize \
@@ -71,7 +71,7 @@
sw sh dw0 dh0 dw1 dh1 dw2 dh2 dw3 dh3 \
frout0 frout1 frout2 frout3 \
lqp0 lqp1 lqp2 lqp3 \
- rc FrSkip tarb ltarb0 ltarb1 ltarb2 ltarb3 \
+ rc FrSkip tarb ltarb0 ltarb1 ltarb2 ltarb3 \
slcmd0 slcnum0 slcmd1 slcnum1 \
slcmd2 slcnum2 slcmd3 slcnum3 \
MaxNalSZ \