ref: ed3a576e8b103032b659febc5d3c62565c9cf7d7
dir: /sys/src/9/bcm64/sysreg.h/
#define MIDR_EL1 SYSREG(3,0,0,0,0) #define MPIDR_EL1 SYSREG(3,0,0,0,5) #define ID_AA64MMFR0_EL1 SYSREG(3,0,0,7,0) #define SCTLR_EL1 SYSREG(3,0,1,0,0) #define CPACR_EL1 SYSREG(3,0,1,0,2) #define MAIR_EL1 SYSREG(3,0,10,2,0) #define TCR_EL1 SYSREG(3,0,2,0,2) #define TTBR0_EL1 SYSREG(3,0,2,0,0) #define TTBR1_EL1 SYSREG(3,0,2,0,1) #define ESR_EL1 SYSREG(3,0,5,2,0) #define FAR_EL1 SYSREG(3,0,6,0,0) #define VBAR_EL1 SYSREG(3,0,12,0,0) #define VTTBR_EL2 SYSREG(3,4,2,1,0) #define SP_EL0 SYSREG(3,0,4,1,0) #define SP_EL1 SYSREG(3,4,4,1,0) #define SP_EL2 SYSREG(3,6,4,1,0) #define SCTLR_EL2 SYSREG(3,4,1,0,0) #define HCR_EL2 SYSREG(3,4,1,1,0) #define MDCR_EL2 SYSREG(3,4,1,1,1) #define PMCR_EL0 SYSREG(3,3,9,12,0) #define PMCNTENSET SYSREG(3,3,9,12,1) #define PMCCNTR_EL0 SYSREG(3,3,9,13,0) #define PMUSERENR_EL0 SYSREG(3,3,9,14,0) #define CNTP_TVAL_EL0 SYSREG(3,3,14,2,0) #define CNTP_CTL_EL0 SYSREG(3,3,14,2,1) #define CNTP_CVAL_EL0 SYSREG(3,3,14,2,2) #define TPIDR_EL0 SYSREG(3,3,13,0,2) #define TPIDR_EL1 SYSREG(3,0,13,0,4) #define CCSIDR_EL1 SYSREG(3,1,0,0,0) #define CSSELR_EL1 SYSREG(3,2,0,0,0) #define ACTLR_EL2 SYSREG(3,4,1,0,1) #define CPUACTLR_EL1 SYSREG(3,1,15,2,0) #define CPUECTLR_EL1 SYSREG(3,1,15,2,1) /* l.s redefines this for the assembler */ #define SYSREG(op0,op1,Cn,Cm,op2) ((op0)<<19|(op1)<<16|(Cn)<<12|(Cm)<<8|(op2)<<5) #define OSHLD (0<<2 | 1) #define OSHST (0<<2 | 2) #define OSH (0<<2 | 3) #define NSHLD (1<<2 | 1) #define NSHST (1<<2 | 2) #define NSH (1<<2 | 3) #define ISHLD (2<<2 | 1) #define ISHST (2<<2 | 2) #define ISH (2<<2 | 3) #define LD (3<<2 | 1) #define ST (3<<2 | 2) #define SY (3<<2 | 3)