shithub: openh264

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f5e483ce – Guangwei Wang <guangwwa@cisco.com> authored on 2016/06/15 09:19

fix android build issue

2e6c9f7c – HaiboZhu <haibozhu@cisco.com> authored and GitHub <noreply@github.com> committed on 2016/06/15 06:31

Merge pull request #2496 from saamas/processing-relax-downsample-buffer-size-requirement

d35647ec – HaiboZhu <haibozhu@cisco.com> authored and GitHub <noreply@github.com> committed on 2016/06/15 06:24

Merge pull request #2491 from ruil2/nalsize

151a7ff6 – HaiboZhu <haibozhu@cisco.com> authored and GitHub <noreply@github.com> committed on 2016/06/15 06:23

Merge pull request #2490 from sijchen/refactor_ref4

84a7669b – HaiboZhu <haibozhu@cisco.com> authored and GitHub <noreply@github.com> committed on 2016/06/15 06:05

Merge pull request #2464 from bumblebritches57/MVC

4b6f0370 – ruil2 <ruil2@cisco.com> authored and GitHub <noreply@github.com> committed on 2016/06/12 06:02

Merge pull request #2489 from saamas/processing-dyadic-bilinear-downsample-optimizations

fe4a47a9 – Sindre Aamås <saamas@cisco.com> authored on 2016/06/08 17:53

[UT] Add comment on X86_ASM checksum ifdef

b5cef5d4 – Karina <ruil2@cisco.com> authored on 2016/06/07 09:32

modify reserved nal header size and change source frame in NalSizeChecking UT

94c94ca3 – sijchen <sijchen@cisco.com> authored on 2016/06/07 10:41

Merge pull request #2493 from ruil2/configure

4c8458f7 – sijchen <sijchen@cisco.com> authored on 2016/06/07 10:41

Merge pull request #2494 from ruil2/stat

40f4fc05 – Karina <ruil2@cisco.com> authored on 2016/06/06 13:13

get each spatial layer qp

c1255451 – Karina <ruil2@cisco.com> authored on 2016/06/06 13:06

use the correct frametype in statistics info

02218e2d – Karina <ruil2@cisco.com> authored on 2016/06/06 12:22

modify configure file comments

106d13d2 – ruil2 <ruil2@cisco.com> authored on 2016/06/06 08:46

Merge pull request #2492 from saamas/processing-x86-downsample-use-lddqu

f183891c – Sindre Aamås <saamas@cisco.com> authored on 2016/06/03 20:41

[Processing/x86] Use lddqu in case we still run on anything that benefits

2171d84f – Karina <ruil2@cisco.com> authored on 2016/06/03 09:34

add nalsize checking UT and fix nalsize control when cabac on

5a9c6db3 – Sindre Aamås <saamas@cisco.com> authored on 2016/06/01 19:57

[Processing] Relax downsample buffer size requirement

3eba8076 – ruil2 <ruil2@cisco.com> authored on 2016/06/03 09:39

Merge pull request #2487 from sijchen/refactor_ref31

68a5910f – Sindre Aamås <saamas@cisco.com> authored on 2016/06/03 08:00

[Processing] Clear LSB before rounding up dyadic downsample width

8a0af4a3 – Sindre Aamås <saamas@cisco.com> authored on 2016/06/01 19:45

[Processing/x86] DyadicBilinearDownsample optimizations

7cbb75ea – Sindre Aamås <saamas@cisco.com> authored on 2016/06/01 19:36

[Processing] Pick dyadic downsample function based on stride

770e48ac – Sindre Aamås <saamas@cisco.com> authored on 2016/06/01 19:21

[Processing] Remove unused align macros

1fa02f6b – sijchen <sijchen@cisco.com> authored on 2016/06/02 06:00

Merge pull request #2488 from ruil2/codingIdx1

4f41c3a5 – Karina <ruil2@cisco.com> authored on 2016/06/02 17:17

fix codingIdx update issue

a7ae1efc – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/06/01 17:33

add back the missing part after merging and formatting

8bacc3d4 – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/06/01 17:26

Preprocess: refactor to improve code readability

f6b6a0f6 – sijchen <sijchen@cisco.com> authored on 2016/06/01 05:28

Merge pull request #2485 from ruil2/init

268a0eb6 – Karina <ruil2@cisco.com> authored on 2016/06/01 06:52

remove redundant initialization

8537a927 – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/06/01 05:20

fix a prob

a9601cdc – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/05/27 13:07

refactor to avoid only use idx0 in syntax writing, for now it has no impact on bs, may benefit future usage

515eeb41 – HaiboZhu <haibozhu@cisco.com> authored on 2016/06/01 05:03

Merge pull request #2481 from ruil2/maxbitrate1

7ccc377d – HaiboZhu <haibozhu@cisco.com> authored on 2016/06/01 05:03

Merge pull request #2480 from ruil2/fix

2d3fc37a – ruil2 <ruil2@cisco.com> authored on 2016/06/01 04:31

Merge pull request #2484 from sijchen/refactor_preprocess13

87e81a7a – Karina <ruil2@cisco.com> authored on 2016/06/01 04:21

use the same name to avoid confusing.

dd021b6c – Karina <ruil2@cisco.com> authored on 2016/05/31 17:01

fix iContinualSkipFrames calculation

8effa45e – Karina <ruil2@cisco.com> authored on 2016/05/31 16:46

fix removing parameter setting

df77a5d5 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/31 13:20

Merge pull request #2478 from ruil2/refine_rc1

4fc2b1f6 – Karina <ruil2@cisco.com> authored on 2016/05/31 12:08

refine RC

3f199f92 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/31 12:33

Merge pull request #2477 from ruil2/add_param_configure

03863ae4 – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/05/31 10:36

different preprocess actually used diff source picture management

7f2ba4dc – Karina <ruil2@cisco.com> authored on 2016/05/31 09:53

add savc setting in configure file and command line

a1cae497 – sijchen@cisco.com <sijchen@cisco.com> authored on 2016/05/31 05:46

add class for diff preprocess strategy

1d2b52e4 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/31 07:08

Merge pull request #2476 from ruil2/did1

c29da290 – sijchen <sijchen@cisco.com> authored on 2016/05/31 06:58

Merge pull request #2479 from ruil2/refine_rc1

64ad70b0 – Karina <ruil2@cisco.com> authored on 2016/05/31 13:35

get the correct did for savc case

e3c30660 – Karina <ruil2@cisco.com> authored on 2016/05/30 11:03

fix dependency ID mapping issue

39c2fb3d – ruil2 <ruil2@cisco.com> authored on 2016/05/27 11:17

Merge pull request #2472 from saamas/processing-x86-general-bilinear-downsample-optimizations

563376df – Sindre Aamås <saamas@cisco.com> authored on 2016/05/25 10:15

[UT] Test downsampling routines with a wider variety of height ratios

c17a58ef – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/25 06:00

Merge pull request #2473 from ruil2/update_interface

780101fc – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/25 05:59

Merge pull request #2474 from ruil2/overflow

2ef9613e – Karina <ruil2@cisco.com> authored on 2016/05/24 09:25

avoid overflow

4fec6d58 – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 09:10

[UT] Test generic downsampling routines with a wider variety of width ratios

e4902159 – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 09:08

[Processing/x86] Add an AVX2 implementation of GeneralBilinearAccurateDownsample

b43e58a3 – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 09:06

[Processing/x86] Add an AVX2 implementation of GeneralBilinearFastDownsample

b1013095 – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 09:02

[Processing/x86] Add an SSE4.1 implementation of GeneralBilinearAccurateDownsample

1995e03d – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 08:56

[Processing/x86] Add an SSSE3 implementation of GeneralBilinearFastDownsample

c96c8b05 – ruil2 <ruil2@cisco.com> authored on 2016/05/23 09:21

Merge pull request #2468 from sijchen/refactor_pre

cbaf0875 – Sindre Aamås <saamas@cisco.com> authored on 2016/05/23 08:48

[Processing] Reduce duplication in downsampling wrappers

685b6144 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/23 05:49

Merge pull request #2469 from ruil2/fix_bitrate

9b2dd553 – Karina <ruil2@cisco.com> authored on 2016/05/20 08:54

add GetBsPostion for cabac and cavlc

ac37666c – Karina <ruil2@cisco.com> authored on 2016/05/19 13:17

modify the interface that use a independent subseqID for each layer

27e803f6 – sijchen <sijchen@cisco.com> authored on 2016/05/19 05:42

refactor to make logic clean

a5e4cca7 – sijchen <sijchen@cisco.com> authored on 2016/05/18 17:35

Merge pull request #2467 from ruil2/overflow

8a341070 – Karina <ruil2@cisco.com> authored on 2016/05/19 08:00

fix overflow issue

3fd490db – sijchen <sijchen@cisco.com> authored on 2016/05/18 07:40

Merge pull request #2460 from sijchen/refactor_ref2

1ac02f30 – sijchen <sijchen@cisco.com> authored on 2016/05/18 06:57

fix conflict with master

7188e50a – sijchen <sijchen@cisco.com> authored on 2016/05/18 05:34

Merge pull request #2465 from ruil2/skip_layers

c298d66d – Karina <ruil2@cisco.com> authored on 2016/05/18 05:47

fix temporal layer skip issue

6d79601d – sijchen <sijchen@cisco.com> authored on 2016/05/16 18:57

Merge pull request #2463 from HaiboZhu/Fix_build_error_windows_debug

85f4beb9 – Haibo Zhu <haibozhu@cisco.com> authored on 2016/05/17 09:46

Fix the wrong variable name which casue the build error

46220cfb – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/17 06:51

Merge pull request #2461 from HaiboZhu/Bugfix_remove_undefined_behavior_warning

86c1f0d2 – Haibo Zhu <haibozhu@cisco.com> authored on 2016/05/17 05:40

Remove the undefined behavior waring in parse_cabac

0ec686f7 – ruil2 <ruil2@cisco.com> authored on 2016/05/17 05:19

Merge pull request #2452 from sijchen/refactor_sps2

1eb73529 – sijchen <sijchen@cisco.com> authored on 2016/05/16 06:59

Merge pull request #2458 from ruil2/downsampling2

f623aa31 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/16 11:35

Merge pull request #2459 from ruil2/fix_crash

3b55d649 – Karina <ruil2@cisco.com> authored on 2016/05/16 10:43

fix crash when temporal layer is skipped, the frame should not be encoded

00747540 – sijchen <sijchen@cisco.com> authored on 2016/05/16 06:55

move strategy related pointer to class

96b2a870 – Karina <ruil2@cisco.com> authored on 2016/05/16 05:28

add one new downsampling algorithms

3fa9a484 – sijchen <sijchen@cisco.com> authored on 2016/05/05 12:27

Merge pull request #2433 from hzwangsiyu/master

ffb85046 – sijchen <sijchen@cisco.com> authored on 2016/05/04 11:06

Refactoring: Wrap all the operations related to eSpsPpsIdStrategy to class, to improve code readability

c30cc412 – HaiboZhu <haibozhu@cisco.com> authored on 2016/05/04 05:49

Merge pull request #2448 from saamas/encoder-getnonzerocount-sse42

e9dc9780 – ruil2 <ruil2@cisco.com> authored on 2016/04/28 05:08

Merge pull request #2447 from saamas/encoder-cavlcparamcal-sse42

7d656872 – ruil2 <ruil2@cisco.com> authored on 2016/04/28 05:08

Merge pull request #2441 from saamas/encoder-add-avx2-4x4-quantization-routines

56618249 – ruil2 <ruil2@cisco.com> authored on 2016/04/28 05:08

Merge pull request #2436 from saamas/processing-add-avx2-vaa-routines

fb0b2b3f – Sindre Aamås <saamas@cisco.com> authored on 2016/04/24 18:59

[Encoder/x86] Drop unneeded LOAD_4_PARA in CavlcParamCal_sse42

d1c77131 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/24 18:36

[Encoder/x86] Minor CavlcParamCal_sse42 tweak

f56bdc3a – Sindre Aamås <saamas@cisco.com> authored on 2016/04/21 12:29

[Encoder/x86] Minor CavlcParamCal_sse42 tweak

2eb88007 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/21 11:46

[Encoder/x86] Remove a leftover mov instruction in CavlcParamCal_sse42

4645bd26 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/19 15:42

[Encoder] Add an SSE4.2 implementation of WelsGetNonZeroCount

d906dda2 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/19 16:50

[UT] Improve GetNonZeroCount tests

3f31aff4 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/19 12:41

[Encoder] Add an SSE4.2 implementation of CavlcParamCal

502b1692 – Sindre Aamås <saamas@cisco.com> authored on 2016/04/19 12:37

[UT] Add tests for CavlcParamCal_c and CavlcParamCal_sse2

98c6c6de – HaiboZhu <haibozhu@cisco.com> authored on 2016/04/20 06:48

Merge pull request #2446 from HaiboZhu/Reduce_log_size_for_parse_only_mode

3b68840d – HaiboZhu <haibozhu@cisco.com> authored on 2016/04/20 06:03

Merge pull request #2444 from GuangweiWang/fix-assembly-arm64

3ccecfbd – Haibo Zhu <haibozhu@cisco.com> authored on 2016/04/20 05:58

Add the log reduce logic into parse only mode

c9433ee7 – HaiboZhu <haibozhu@cisco.com> authored on 2016/04/18 05:21

Merge pull request #2442 from ruil2/deblocking_fix

cc407b4b – Guangwei Wang <guangwwa@cisco.com> authored on 2016/04/17 15:47

fix code style

0b8cdcaf – Guangwei Wang <guangwwa@cisco.com> authored on 2016/04/17 15:41

extension 32-bit parameters to 64-bit on arm64 assembly function

1ecb9582 – Karina <ruil2@cisco.com> authored on 2016/04/14 10:57

update arm assembly comments

dd340b7f – Karina <ruil2@cisco.com> authored on 2016/04/14 10:49

modify neon comment